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VERILOG RTL code for PRBS generator

 
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kma



Joined: 16 Oct 2006
Posts: 5


Post31 Oct 2006 2:38   VERILOG RTL code for PRBS generator
tags: prbs generator prbs verilog prbs code generator verilog prbs generator prbs generator verilog code prbs

Can anyone tell me how to get the VERILOG RTL code for PRBS generator? Thanks.
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echo47



Joined: 07 Apr 2002
Posts: 4205
Helped: 565


Post31 Oct 2006 5:34   Re: VERILOG RTL code for PRBS generator
tags: code prbs prbs lfsr

Here are the key lines of code for a 19-bit LFSR, which generates a PRBS. The output is simply lfsr bit 0.

Code:
  reg [18:0] lfsr=0;

  always @ (posedge clock)
    lfsr <= {lfsr, ~lfsr[18]^lfsr[5]^lfsr[1]^lfsr[0]};

If you need a different cycle length, try this Xilinx app note:
http://www.xilinx.com/bvdocs/appnotes/xapp210.pdf
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