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help on place and route in ISE7.1i
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s3034585



Joined: 24 May 2004
Posts: 226
Helped: 1
Post13 Sep 2006 11:30   

help on place and route in ISE7.1i
Hi Guys
I am using ISE7.1i for my design. While doing place and route i get a particular warning which i am not able to understand. Can anyone please explain wht it means and why it is comming.

WARNING:Par:276 - The signal MB(197)_IBUF has no load

I get this warning for all the io pins what i have for my fpga.

Thanks in advance
tama
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vs21



Joined: 08 Jun 2006
Posts: 21
Post13 Sep 2006 12:57   

Re: help on place and route in ISE7.1i
Hi,

That means, whole of your logic is optimized, check, whether your clock is properly synthesized.

Regards
Viks
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bansalr



Joined: 22 Dec 2005
Posts: 158
Helped: 13
Post14 Sep 2006 3:07   

Re: help on place and route in ISE7.1i
It means that this particular input is not used in the design. i.e no load to the input.
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s3034585



Joined: 24 May 2004
Posts: 226
Helped: 1
Post14 Sep 2006 4:55   

Re: help on place and route in ISE7.1i
Hi vs21
Thanks for your reply. I could not understand checking the clock is synthesised or not... I mean how do i verify this. Can you please explain.

Thanks once again..
tama
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bansalr



Joined: 22 Dec 2005
Posts: 158
Helped: 13
Post14 Sep 2006 7:21   

Re: help on place and route in ISE7.1i
just check in the PAR reports no of clocks. otherwise u can open the design into fpga editor and view the clock net.
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