rakesh_aadhimoolam
Joined: 14 Mar 2006
Posts: 218
Helped: 16
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 30 Jul 2006 10:07 interview questions(contd...) |
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4)what causes the fabrication time(turn around time) of gate array to be substantially less than standard cell......
5)what are the advantages of monolithic SRAM block over a SRAM built from LUTs and why do these advantages occur (on FPGAs that use LUTs, SRAM can be built out of individual LUTs however most FPGAs include monolithic block of SRAM)
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