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rakesh_aadhimoolam
Joined: 14 Mar 2006
Posts: 218
Helped: 16
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 30 Jul 2006 9:55 some interview questions......... |
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hello.........
1) if i have two chip design (two FPGA).what timing characteristic of each chip would i need to know in order to compute max. frequency at which data can be transferred between two chips...
2)how can i minimize the required external setup time of internal pin...........
3)what timing constraint am i checking if i compute minimum path delay from external input to input of register.......
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skyscar
Joined: 24 Jul 2006
Posts: 3
Helped: 1
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| 30 Jul 2006 15:36 Re: some interview questions......... |
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| (3) OFFSET_IN_BEFORE
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bigrice911
Joined: 27 Apr 2004
Posts: 84
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| 31 Jul 2006 2:20 Re: some interview questions......... |
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| (1) chip 1 setup time and chip 2 hold time
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bansalr
Joined: 22 Dec 2005
Posts: 155
Helped: 13
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| 01 Aug 2006 5:36 Re: some interview questions......... |
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if i have two chip design (two FPGA).what timing characteristic of each chip would i need to know in order to compute max. frequency at which data can be transferred between two chips...
offset in and offset out of both the FPGA
2)how can i minimize the required external setup time of internal pin...........
Use IOB flip flop to register the data at the output.
3)what timing constraint am i checking if i compute minimum path delay from external input to input of register.......
offset in after
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