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Resistance
Joined: 24 Dec 2005
Posts: 77
Helped: 3
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 23 Jun 2006 9:36 Interconnect length estimation and modelling?? |
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Hi,
I want to know whether its possible to estimate interconnect lengths and their corresponding RC values with just the final netlist(after synthesis) before place and route??
I know it would be approx but is it possible??
Any tools starting from Asic tools to tools in spice ? any way to do it.???
Answers with references are welcome..
Regards.
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nav_vlsi
Joined: 17 Aug 2005
Posts: 48
Helped: 5
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| 26 Jun 2006 7:54 Re: Interconnect length estimation and modelling?? |
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is it possible to estimate interconnect length approx before P&R ? it may not be possible coz,assume that if 2 cells has to pass some signal (rather communicate). if your cells are not placed , how can v find the relative distance between them . thus interconnect length estimation may not be possible.
correct me if i am wrong
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Resistance
Joined: 24 Dec 2005
Posts: 77
Helped: 3
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| 26 Jun 2006 8:30 Re: Interconnect length estimation and modelling?? |
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Hi nav_vlsi,
Actually I know that but wat I want to do is estimate approx the interconnect length even before p&r..
Jus by the hierarchy of the design or by the area occupied each module within the top module can we come with a rough idea of the interconnect length is my Q?
regards.
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rajesh9999
Joined: 19 Oct 2005
Posts: 44
Helped: 2
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| 27 Jun 2006 3:31 Re: Interconnect length estimation and modelling?? |
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Resistance,
Even with area of modules known, you cannot estimate wirelengths since at a minimum you need to know relative placements of these blocks. You will not be better off than a wireload model.
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