electronics forum

Rules | Recent posts | topic RSS | Search | Register  | Log in

scripts for cadence corner simulation


Post new topic  Reply to topic    EDAboard.com Forum Index -> Analog IC Design & Layout -> scripts for cadence corner simulation
Author Message
surreyian



Joined: 10 Feb 2006
Posts: 49


Post17 May 2006 6:10   

scripts for cadence corner simulation


Hello, currently im doing corner simulation by maunal changing the temperature and corner parameters. I understand that i can use ocean scripts or other language to do. How do i go about writing the script and how do i run it later on.

appreciate your kindest help.
Back to top
elbadry



Joined: 06 May 2005
Posts: 363
Helped: 62
Location: Egypt


Post17 May 2006 17:00   

Re: scripts for cadence corner simulation


You actually do not need to write all the script. You can make Cadence enerate the script then modify it to include your own loops to sweep on the corners.

To generate the ocean script from cadence. In the Analog Design environment choose:

Session -> save script

Then go to the file, and place your model file inside the loop, changing the corner you need at each iteration.

To run the file, you have two options:

1. In icfb, type: load("file name")

2. open a terminal, type: ocean. run the same comman there.

Hope this helps
Back to top
Google
AdSense
Google Adsense




Post17 May 2006 17:00   

Ads




Back to top
pfd001



Joined: 23 Jul 2005
Posts: 397
Helped: 34


Post18 May 2006 3:59   

scripts for cadence corner simulation


HI, elbadry, is it possible for you to post a example. thanks
Back to top
shadoweek



Joined: 30 Jun 2005
Posts: 62
Helped: 1


Post18 May 2006 5:49   

Re: scripts for cadence corner simulation


pfd001 wrote:
HI, elbadry, is it possible for you to post a example. thanks


i support this idea... can anybody, also, explain what is an ocean script cause i am a newbie with cadence...

many thanks...
Back to top
surreyian



Joined: 10 Feb 2006
Posts: 49


Post18 May 2006 9:57   

Re: scripts for cadence corner simulation


elbadry wrote:
You actually do not need to write all the script. You can make Cadence enerate the script then modify it to include your own loops to sweep on the corners.

To generate the ocean script from cadence. In the Analog Design environment choose:

Session -> save script

Then go to the file, and place your model file inside the loop, changing the corner you need at each iteration.

To run the file, you have two options:

1. In icfb, type: load("file name")

2. open a terminal, type: ocean. run the same comman there.

Hope this helps


hello, thanks for the pointers.
but included corner ss into the script and load it through icfb, typing load "oceanScript .ocn". but it encountered some error. The error mgs says the it does not contain valid PSF results. giving names of some parameters that is not defined. i'm not sure what went wrong.
Back to top
elbadry



Joined: 06 May 2005
Posts: 363
Helped: 62
Location: Egypt


Post18 May 2006 20:53   

Re: scripts for cadence corner simulation


Before runig a script, you must have run a simulation of your circuit normally ( with ADE ). The error simply says that the rsults directory contains no results.

I'll try to send an example soon...
Back to top
elbadry



Joined: 06 May 2005
Posts: 363
Helped: 62
Location: Egypt


Post21 May 2006 8:00   

Re: scripts for cadence corner simulation


Here is a script that calculates the maximum and minimum DC bias current across process corners

Code:

;
ocnWaveformTool( 'wavescan )
simulator( 'spectre )
design("/space/elbadry/simulation/tb_ota_olp/spectre/schematic/netlist/netlist")
resultsDir( "/space/elbadry/simulation/tb_ota_olp/spectre/schematic" )

temp( 27.0 )

; PVT Corners' lists:

mos_sections  = '( "ss" "sf" "tt" "fs" "ff" )
vddList = '( 1.1 1.2 1.3 )
tempList = '( -40 27 125 )

; Output File definition:

Out_File = "/home/elbadry/Desktop/dc_current"
n=outfile(Out_File "a")

; Variable initialization
I_List=list();

; analysis definition
analysis('dc ?saveOppoint t  )

;Loop across corners

foreach( Model mos_sections
; Replaced 2;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
modelFile(
    '("/home/cdsmgr/Linux/Design_Kits/tsmc/tsmc13/tsmc13rf_1P6M_12v_33v_UTM/tsmc13rf/../models/RF_12_33_FSG/T013CMSP002_1_1p1/spectre/ResModel.scs" "res_t")
    '("/home/cdsmgr/Linux/Design_Kits/tsmc/tsmc13/tsmc13rf_1P6M_12v_33v_UTM/tsmc13rf/../models/RF_12_33_FSG/T013CMSP002_1_1p1/spectre/ResModel.scs" "tt_disres")
    '("/home/cdsmgr/Linux/Design_Kits/tsmc/tsmc13/tsmc13rf_1P6M_12v_33v_UTM/tsmc13rf/../models/RF_12_33_FSG/T013CMSP002_1_1p1/spectre/rf013.scs" "tt_rfmos")
    '("/home/cdsmgr/Linux/Design_Kits/tsmc/tsmc13/tsmc13rf_1P6M_12v_33v_UTM/tsmc13rf/../models/RF_12_33_FSG/T013CMSP002_1_1p1/spectre/rf013.scs" "tt_rfmos33")
    '("/home/cdsmgr/Linux/Design_Kits/tsmc/tsmc13/tsmc13rf_1P6M_12v_33v_UTM/tsmc13rf/../models/RF_12_33_FSG/T013CMSP002_1_1p1/spectre/rf013.scs" "tt_rfmim")
    '("/home/cdsmgr/Linux/Design_Kits/tsmc/tsmc13/tsmc13rf_1P6M_12v_33v_UTM/tsmc13rf/../models/RF_12_33_FSG/T013CMSP002_1_1p1/spectre/rf013.scs" "tt_rfind")
    '("/home/cdsmgr/Linux/Design_Kits/tsmc/tsmc13/tsmc13rf_1P6M_12v_33v_UTM/tsmc13rf/../models/RF_12_33_FSG/T013CMSP002_1_1p1/spectre/rf013.scs" "tt_rfmvar")
    '("/home/cdsmgr/Linux/Design_Kits/tsmc/tsmc13/tsmc13rf_1P6M_12v_33v_UTM/tsmc13rf/../models/RF_12_33_FSG/T013CMSP002_1_1p1/spectre/rf013.scs" "tt_rfmvar_33")
    '("/home/cdsmgr/Linux/Design_Kits/tsmc/tsmc13/tsmc13rf_1P6M_12v_33v_UTM/tsmc13rf/../models/RF_12_33_FSG/T013CMSP002_1_1p1/spectre/rf013.scs" "tt_rfjvar")
    '("/home/cdsmgr/Linux/Design_Kits/tsmc/tsmc13/tsmc13rf_1P6M_12v_33v_UTM/tsmc13rf/../models/RF_12_33_FSG/T013CMSP002_1_1p1/spectre/rf013.scs" "tt_rfres_sa")
    '("/home/cdsmgr/Linux/Design_Kits/tsmc/tsmc13/tsmc13rf_1P6M_12v_33v_UTM/tsmc13rf/../models/RF_12_33_FSG/T013CMSP002_1_1p1/spectre/rf013.scs" "tt_rfres_rpo")
    '("/home/cdsmgr/Linux/Design_Kits/tsmc/tsmc13/tsmc13rf_1P6M_12v_33v_UTM/tsmc13rf/../models/RF_12_33_FSG/T013CMSP002_1_1p1/spectre/rf013.scs" "tt_rfres_hri")
    list("/home/cdsmgr/Linux/Design_Kits/tsmc/tsmc13/tsmc13rf_1P6M_12v_33v_UTM/tsmc13rf/../models/RF_12_33_FSG/T013CMSP002_1_1p1/spectre/rf013.scs" Model)
    '("/home/cdsmgr/Linux/Design_Kits/tsmc/tsmc13/tsmc13rf_1P6M_12v_33v_UTM/tsmc13rf/../models/RF_12_33_FSG/T013CMSP002_1_1p1/spectre/rf013.scs" "tt_33")
    '("/home/cdsmgr/Linux/Design_Kits/tsmc/tsmc13/tsmc13rf_1P6M_12v_33v_UTM/tsmc13rf/../models/RF_12_33_FSG/T013CMSP002_1_1p1/spectre/rf013.scs" "tt_na")
    '("/home/cdsmgr/Linux/Design_Kits/tsmc/tsmc13/tsmc13rf_1P6M_12v_33v_UTM/tsmc13rf/../models/RF_12_33_FSG/T013CMSP002_1_1p1/spectre/rf013.scs" "tt_lvt")
    '("/home/cdsmgr/Linux/Design_Kits/tsmc/tsmc13/tsmc13rf_1P6M_12v_33v_UTM/tsmc13rf/../models/RF_12_33_FSG/T013CMSP002_1_1p1/spectre/rf013.scs" "tt_hvt")
    '("/home/cdsmgr/Linux/Design_Kits/tsmc/tsmc13/tsmc13rf_1P6M_12v_33v_UTM/tsmc13rf/../models/RF_12_33_FSG/T013CMSP002_1_1p1/spectre/rf013.scs" "tt_na33")
    '("/home/cdsmgr/Linux/Design_Kits/tsmc/tsmc13/tsmc13rf_1P6M_12v_33v_UTM/tsmc13rf/../models/RF_12_33_FSG/T013CMSP002_1_1p1/spectre/rf013.scs" "tt_bip")
    '("/home/cdsmgr/Linux/Design_Kits/tsmc/tsmc13/tsmc13rf_1P6M_12v_33v_UTM/tsmc13rf/../models/RF_12_33_FSG/T013CMSP002_1_1p1/spectre/rf013.scs" "tt_bip_npn")
    '("/home/cdsmgr/Linux/Design_Kits/tsmc/tsmc13/tsmc13rf_1P6M_12v_33v_UTM/tsmc13rf/../models/RF_12_33_FSG/T013CMSP002_1_1p1/spectre/rf013.scs" "tt_dio")
    '("/home/cdsmgr/Linux/Design_Kits/tsmc/tsmc13/tsmc13rf_1P6M_12v_33v_UTM/tsmc13rf/../models/RF_12_33_FSG/T013CMSP002_1_1p1/spectre/rf013.scs" "tt_dio_dnw")
    '("/home/cdsmgr/Linux/Design_Kits/tsmc/tsmc13/tsmc13rf_1P6M_12v_33v_UTM/tsmc13rf/../models/RF_12_33_FSG/T013CMSP002_1_1p1/spectre/rf013.scs" "tt_dio_hvt")
    '("/home/cdsmgr/Linux/Design_Kits/tsmc/tsmc13/tsmc13rf_1P6M_12v_33v_UTM/tsmc13rf/../models/RF_12_33_FSG/T013CMSP002_1_1p1/spectre/rf013.scs" "tt_dio_na")
    '("/home/cdsmgr/Linux/Design_Kits/tsmc/tsmc13/tsmc13rf_1P6M_12v_33v_UTM/tsmc13rf/../models/RF_12_33_FSG/T013CMSP002_1_1p1/spectre/rf013.scs" "tt_dio_33")
    '("/home/cdsmgr/Linux/Design_Kits/tsmc/tsmc13/tsmc13rf_1P6M_12v_33v_UTM/tsmc13rf/../models/RF_12_33_FSG/T013CMSP002_1_1p1/spectre/rf013.scs" "tt_dio_lvt")
    '("/home/cdsmgr/Linux/Design_Kits/tsmc/tsmc13/tsmc13rf_1P6M_12v_33v_UTM/tsmc13rf/../models/RF_12_33_FSG/T013CMSP002_1_1p1/spectre/rf013.scs" "tt_dio_na33")
    '("/home/cdsmgr/Linux/Design_Kits/tsmc/tsmc13/tsmc13rf_1P6M_12v_33v_UTM/tsmc13rf/../models/RF_12_33_FSG/T013CMSP002_1_1p1/spectre/rf013.scs" "tt_res")
    '("/home/cdsmgr/Linux/Design_Kits/tsmc/tsmc13/tsmc13rf_1P6M_12v_33v_UTM/tsmc13rf/../models/RF_12_33_FSG/T013CMSP002_1_1p1/spectre/rf013.scs" "tt_mos_cap")
    '("/home/cdsmgr/Linux/Design_Kits/tsmc/tsmc13/tsmc13rf_1P6M_12v_33v_UTM/tsmc13rf/../models/RF_12_33_FSG/T013CMSP002_1_1p1/spectre/rf013.scs" "tt_mos_cap_33")
    '("/home/cdsmgr/Linux/Design_Kits/tsmc/tsmc13/tsmc13rf_1P6M_12v_33v_UTM/tsmc13rf/../models/RF_12_33_FSG/T013CMSP002_1_1p1/spectre/rf013.scs" "tt_mim")
)
;end of REPLACED 2;;;;;;;;;;;;;;;;;;
   fprintf(n "\nModel: %s\n" Model)
      foreach( Supply vddList
         desVar( "Vsupply" Supply)
         fprintf(n "\nSupply = %3.2f\n" Supply)
    fprintf(n "\n%20s    %-7s\n" "Temp" "Total I")
         foreach( SimTemperature tempList
            temp( SimTemperature )
            run()
            x=-IDC("/V0/PLUS")
            fprintf(n "%20n     %-4.3e\n" SimTemperature x)
            I_List=append1(I_List x)
           ) ;foreach
      );foreach
   fprintf(n "**********************************************************")
);foreach

I_List=sort(I_List 'lessp)
I_min = nthelem( 1 I_List )
I_max =car(last( I_List ))

newline( n )
newline( n )
fprintf( n "***************************************************************\n" )
fprintf( n "********************        Summary        ********************\n" )
fprintf( n "***************************************************************\n" )
newline( n )

fprintf(n "\n\n Maximum DC current = %4.3e\n Minimum DC Current = %4.3e"
        I_max I_min)
close(n)

Back to top
Arabic versionBulgarian versionCatalan versionCzech versionDanish versionGerman versionGreek versionEnglish versionSpanish versionFinnish versionFrench versionHindi versionCroatian versionIndonesian versionItalian versionHebrew versionJapanese versionKorean versionLithuanian versionLatvian versionDutch versionNorwegian versionPolish versionPortuguese versionRomanian versionRussian versionSlovak versionSlovenian versionSerbian versionSwedish versionTagalog versionUkrainian versionVietnamese versionChinese version
Post new topic  Reply to topic    EDAboard.com Forum Index -> Analog IC Design & Layout -> scripts for cadence corner simulation
Page 1 of 1 All times are GMT + 1 Hour
Similar topics:
Cadence corner simulation (7)
Corner & Monte-Carlo simulation in Cadence (2)
Analysing waveforms, scripts for Cadence, spectre (16)
monte carlo simulation,corner simulation,PVT simulation (7)
Writing scripts in Cadence (1)
How to Integrate Scripts in Cadence (10)
Running scripts in Cadence SoC Encounter (3)
Corner analysis in Cadence (11)
Cadence Corner Setup (6)
Corner & Monte Carlo, Cadence (2)


Abuse || Administrator || Moderators || Support us || sitemap
topic RSS