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Maverickmax
Joined: 06 Dec 2004
Posts: 406
Helped: 3
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 07 May 2006 21:23 PWM duty cycle using PIC |
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Hi
I have been reading the data sheet regarding the PWM duty cycle and Im not entirely 100 percent sure about it because I could not calculated the value of maximum duty cycle in order to determine (1F) 25% duty cycle.
The detail of code c an be found in page 14-14 from this link:
http://ww1.microchip.com/downloads/en/DeviceDoc/31014a.pdf
I would appreicate someone explain me how to calculate the PWM duty cycle at the 78.125kHz.
Regards
MM
PS If the 25% duty cycle is used, the value should be 3F instead of IF?
Cuz the maximum resolution is 8 bits??
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namqn
Joined: 19 Feb 2006
Posts: 172
Helped: 19
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08 May 2006 10:54 Re: PWM duty cycle using PIC |
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You are using Mid-range PIC, aren't you?
In PWM mode, both switching frequency and duty cycle are described in 10-bit. However, you could only specify 8 highest bits for the frequency, by using 8-bit register PR2. The 2 lowest bits are internally concatenated to PR2.
For duty cycle, you specify the 8 highest bits in CCPRxL register (x is the number of the CCP module), and the 2 lowest bits in the CCPxCON<5:4> bits.
Therefore, you can have 10-bit resolution for duty cycle, but can only get 8 highest bits set for the frequency.
In the example in the document '31034a.pdf' at page 14-14, you would need to set CCPR1L to 0x10, and CCP1CON<5:4> to '00', to get a 25% duty cycle, with PR2 set to 0x3F.
Hope this helps!
Cheers,
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Maverickmax
Joined: 06 Dec 2004
Posts: 406
Helped: 3
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08 May 2006 19:09 Re: PWM duty cycle using PIC |
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Sorry...
I still don't understand. Would you please kindly show me the calculation in order to determine the PWM duty cycle?
MM
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namqn
Joined: 19 Feb 2006
Posts: 172
Helped: 19
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09 May 2006 11:29 Re: PWM duty cycle using PIC |
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ok, let's say we have 20 MHz clock frequency as in the .pdf file.
At PWM frequency as 78.125 kHz, your number of count for PWM period
would be: 20,000,000/78,125 = 256 = 0x100.
You will put the highest 8 bits minus one to PR2, 'cause (PR2 + 1) = (PWM period)/4.
8 highest bits are 0x40, so you should put 0x3F into PR2.
For duty cycle of 25%, your number of count would be 256*0.25 = 64 = 0x40.
That will be the number to be put into CCPR1L:CCP1CON<5:4>.
So CCPR1L will contain 8 highest bits, which are 0x10, and CCP1CON<5:4> will contain the 2 lowest bits, which are '00' in this case.
Note that we are considering the counts as 10-bit values.
With this PWM frequency, you can only have 256 counts for the period, and you maximum duty cycle will be that number, or 8-bit PWM resolution.
You can have 10-bit resolution, if you use 4 times smaller PWM frequency, i.e. about 19.5 kHz.
Cheers,
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