How to initialize an array structure in verilog?

EDAboard.com Forum Index -> ASIC Design Methodologies & Tools (Digital) -> How to initialize an array structure in verilog?

Author

Message

yuenkit

Joined: 20 Jan 2005
Posts: 110
Helped: 5

15 Mar 2006 12:30 verilog array

for example,

reg [7:0] mem [0:3];

1. I want to initialize the every element in the mem = 0, how to do that?
2. I want to initialize mem such that mem[0] = 2, mem[1] =4 , mem[2] = 1, mem[3] = 5. how to do that?

Google
AdSense
Google Adsense

15 Mar 2006 12:30 Ads

eda_wiz

Joined: 07 Nov 2001
Posts: 720
Helped: 30

15 Mar 2006 13:27 verilog initialize array

write down all the values in a file and use
$readmemh command

arunragavan

Joined: 01 Jul 2004
Posts: 487
Helped: 21
Location: India

15 Mar 2006 13:43 verilog array initialization

$readmemh or $readmemb is not synthesizable.
u can use it for simulation purpose.
how to u realize in synthesis part?
u must design a simple RAM for synthesis.

Aravind

jjww110

Joined: 19 Apr 2005
Posts: 262
Helped: 5
Location: china

16 Mar 2006 1:38 array verilog

if you use register not memory,please use for loop
to initialization!!

aravind

Joined: 29 Jun 2004
Posts: 622
Helped: 23
Location: india

16 Mar 2006 2:09 array in verilog

I cant Understand JJWW110.
can u give simple example.
thanks

yuenkit

Joined: 20 Jan 2005
Posts: 110
Helped: 5

16 Mar 2006 10:31 verilog memory array

i guess what jjww said was

Code:

parameter MEM_SIZE = 1024
reg [7:0] mem [0:MEM_SIZE -1]

initial
begin
for (k = 0; k < MEM_SIZE - 1; k = k + 1)
begin
mem[k] = 0;
end
end

weng

Joined: 13 Jan 2006
Posts: 32

17 Mar 2006 1:13 verilog memory initialization

Is this correct? Looks like you actually treat mem as a single bit signal, not a bus signal.

tigerajs

Joined: 08 Feb 2006
Posts: 30

17 Mar 2006 2:38 verilog array initialize

of course it is right, I often do as that

weng

Joined: 13 Jan 2006
Posts: 32

17 Mar 2006 3:20 verilog array initial

How about if I only want to initialize one of the bit of mem? For example, I want to initialize the bit 0 of all mem array to 0?

jjww110

Joined: 19 Apr 2005
Posts: 262
Helped: 5
Location: china

17 Mar 2006 3:58 verilog initialize register

Code:
parameter MEM_SIZE = 1024
reg [7:0] mem [0:MEM_SIZE -1]

initial
begin
for (k = 0; k < MEM_SIZE ; k = k + 1)
begin
mem[k] = 8'h00;
end
end

aravind

Joined: 29 Jun 2004
Posts: 622
Helped: 23
Location: india

17 Mar 2006 5:05 verilog parameter array

whether reg [7:0] mem[ 0:MEM_SIZE -1]

the mem should be a ram file in the name of mem or
verilog itself it take as ram memory?

im having ram library of 512 X 8 (file name RAM512X8.v)
how to write or involve it by using array structure like above ( ram [7:0] ---)