Rules | Recent posts | topic RSS | Search | Register  | Log in

jitter generation circuit

 
Post new topic  Reply to topic    EDAboard.com Forum Index -> Digital communication
Author Message
Rainbow00



Joined: 23 Feb 2006
Posts: 22


Post09 Mar 2006 4:36   jitter generation circuit

Hi,

i need a tunable jitter generation circuit to test the jitter tolearance circuit for a PLL. the PLL can take 19.2MHz, 26MHz and 60MHz clocks. it is prefered that the jitter can be turned up to 2ns.

i did build one circuit with 74 series XOR gate on a breadboard, which takes the clock from waveform generator. however, the clock output suffers from stability problem. assuming i have access to breadboard, waveform generator and common components.

regards
gd
Back to top
Sal



Joined: 29 Nov 2005
Posts: 288
Helped: 36


Post09 Mar 2006 6:55   jitter generation circuit

hi

mm quite interesting requirement since jitter is assumed to be already present in any kind of circuit.

Sal
Back to top
Post new topic  Reply to topic    EDAboard.com Forum Index -> Digital communication
Page 1 of 1 All times are GMT + 1 Hour


Abuse
Administrator
Moderators
topic RSS 
sitemap