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chuan556
Joined: 05 Sep 2005
Posts: 56
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 15 Feb 2006 15:45 big challenge to all the signal engineer |
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hi,i have a question to ask,i pump in the square wave to one circuit then i measure the voltage of the driver,but the result that i get is square wave that keep on increasing like in the attachment,why?
i set the termination as 50 ohm,driver and trace 50 ohm,it should no reflection right?but through simulation the result is totally different,any explaination?
the circuit is driver connect to receiver through via and refer to ground,it is complete loop.
thanks.
rgds,
chuan556
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ahmad_abdulghany
Joined: 12 Apr 2005
Posts: 1369
Helped: 212
Location: Cairo, Egypt
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16 Feb 2006 10:41 Re: big challenge to all the signal engineer |
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What's the input impedance you see through the transimission type?? you should calculate it not only the c/cs impedance of the line, as |Γ|=(ZL-Zc)/(ZL+Zc) ....
If the combination of ZL and Zc gave positive Γ, then you may get overdamped wave at the driver side.
I hope that helped somehow 
BR
Ahmad,
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throwaway18
Joined: 09 Jun 2005
Posts: 563
Helped: 75
Location: Kent, UK
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16 Feb 2006 12:25 Re: offset or oscillation from driver on 50ohm line |
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You have not given us enough information to say.
Run the simulation for longer. Does it reach a steady DC offset or is it an oscillation?
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16 Feb 2006 12:25 Ads |
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chuan556
Joined: 05 Sep 2005
Posts: 56
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16 Feb 2006 16:24 big challenge to all the signal engineer |
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| the simulation result will keep on increasing no matter how long you run it,sorry forgot to mention
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throwaway18
Joined: 09 Jun 2005
Posts: 563
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Location: Kent, UK
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16 Feb 2006 17:04 big challenge to all the signal engineer |
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If it increases forever then your simulation clearly does not reflect reality. Any practical driver is limited by it's power supply.
We still need lots more information.
What simulator software are using using?
What driver circuit are you simulating?
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chuan556
Joined: 05 Sep 2005
Posts: 56
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18 Feb 2006 4:28 big challenge to all the signal engineer |
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i am using speed2000 and the driver just a voltage source.
is it because of reflection so it keep on increasing?
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throwaway18
Joined: 09 Jun 2005
Posts: 563
Helped: 75
Location: Kent, UK
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18 Feb 2006 10:37 big challenge to all the signal engineer |
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Your graph of the voltage shows a DC offset. That is not a reflection.
Last edited by throwaway18 on 21 Feb 2006 18:26; edited 1 time in total |
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chuan556
Joined: 05 Sep 2005
Posts: 56
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21 Feb 2006 3:11 big challenge to all the signal engineer |
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| may you explain what is dc offset?and how it can prevent?
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Fom
Joined: 10 Mar 2004
Posts: 778
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Location: Taiwan
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21 Feb 2006 7:07 Re: big challenge to all the signal engineer |
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Put your schematic if you want get answer.
If you aply to any circuit an ideal source and measure output signal of this source you will get square wave, because driver has zero impedance and will provide square wave independent on load.
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chuan556
Joined: 05 Sep 2005
Posts: 56
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23 Feb 2006 11:32 Re: big challenge to all the signal engineer |
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| Fom wrote: |
Put your schematic if you want get answer.
If you aply to any circuit an ideal source and measure output signal of this source you will get square wave, because driver has zero impedance and will provide square wave independent on load. |
sorry i forgot to put in the schematic,the problem is the square wave keep on increase ,why?
Last edited by chuan556 on 23 Feb 2006 15:44; edited 1 time in total |
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artem
Joined: 22 May 2003
Posts: 1652
Helped: 91
Location: Turan
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23 Feb 2006 13:05 big challenge to all the signal engineer |
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| chuan556, why you put doc file with macros inside ? Is it much easy to put jpg by printscreen utility? What the macros inside your file is used for ?
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chuan556
Joined: 05 Sep 2005
Posts: 56
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23 Feb 2006 15:47 Re: big challenge to all the signal engineer |
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| artem wrote: |
| chuan556, why you put doc file with macros inside ? Is it much easy to put jpg by printscreen utility? What the macros inside your file is used for ? |
i dont know what the marcos is,i try to download and i found that doc is ok.
anyway i convert it to pdf form in order to make it easier for everyone to view
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chuan556
Joined: 05 Sep 2005
Posts: 56
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25 Feb 2006 18:11 big challenge to all the signal engineer |
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i had done the simulation with longer time,and i found out what throwaway18 said,the increment will stable and remain at there.
so i began to wonder why the circuit can be like that since the trace which i am using is short(around 1" and the rise/fall time for my signal is average(1n),so it shouldn't be like that so any reason to explain this?
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artem
Joined: 22 May 2003
Posts: 1652
Helped: 91
Location: Turan
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26 Feb 2006 1:07 big challenge to all the signal engineer |
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I dont know the simulation tool you are using and the nature of simulation
Are ground and power planes somewhere DC connected ? If it is not - that is the effect of the grounds-power planes or other capacitance, its charging effect is seen in increasing DC level on signal plot.
Of course, i could be badly wrong )
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chuan556
Joined: 05 Sep 2005
Posts: 56
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28 Feb 2006 7:17 Re: big challenge to all the signal engineer |
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| artem wrote: |
I dont know the simulation tool you are using and the nature of simulation
Are ground and power planes somewhere DC connected ? If it is not - that is the effect of the grounds-power planes or other capacitance, its charging effect is seen in increasing DC level on signal plot.
Of course, i could be badly wrong ) |
may be you are right, i suspect that it is caused by my pwr and gnd but is there any way to reduce it?or make it disappear so that i can get a nice waveform
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