Static Timing Analysis - Synopsys & Cadence

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carrot

Joined: 23 Feb 2004
Posts: 173
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Location: Bangalore, India

27 Jan 2006 10:34 incentia timecraft market share

Hi

In Synosys, Prime Time is there for Static Timing Analysis(STA)
What about in Cadence, Is it possible to do STA with Buildgates or any other tool is required?

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coolrak

Joined: 16 Aug 2005
Posts: 74
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27 Jan 2006 12:11 Re: Static Timing Analysis - Synopsys & Cadence

Synopsys PT is the industry standard for STA and is the only sign-off tool.

Cadence also has a tool called PEARL for STA and even in Buildgates you can so

STA.But it has limitations and the important thing is it is not signoff.

carrot

Joined: 23 Feb 2004
Posts: 173
Helped: 3
Location: Bangalore, India

28 Jan 2006 9:38 Re: Static Timing Analysis - Synopsys & Cadence

Hi Coolrak,

What is this sign-off tool?
What is its importance? What it has to do with STA?

coolrak

Joined: 16 Aug 2005
Posts: 74
Helped: 4

28 Jan 2006 13:40 Re: Static Timing Analysis - Synopsys & Cadence

A tool is called sign-off, if it is widely used in industry and the results generated by the

tool is consistent with post silicon results. So for STA PrimeTime is the most widely

used and foundry people like to get the design signed off with PT that there is no

timing violations using PrimeTime.

For physical verification Calibre is the sign-off tool

aravind

Joined: 29 Jun 2004
Posts: 622
Helped: 23
Location: india

29 Jan 2006 3:24 Static Timing Analysis - Synopsys & Cadence

Use RTL compiler from cadence.
it is very power synthesis /STA tool from cadence

straw

Joined: 19 Nov 2004
Posts: 50

29 Jan 2006 5:59 Static Timing Analysis - Synopsys & Cadence

now ,STA is important,because the sequial is assured by STA.and lots of manufauture use Pt, except IBM,IBM has their own tools

anjali

Joined: 16 Aug 2005
Posts: 174
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29 Jan 2006 12:31 Re: Static Timing Analysis - Synopsys & Cadence

many are using STA for timing analysis. its a powerfull tool.

coolrak

Joined: 16 Aug 2005
Posts: 74
Helped: 4

30 Jan 2006 7:28 Re: Static Timing Analysis - Synopsys & Cadence

Is there any tool called STA in the market???

aravind

Joined: 29 Jun 2004
Posts: 622
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Location: india

30 Jan 2006 7:31 Static Timing Analysis - Synopsys & Cadence

no tool in the name of STA.
only PrimeTime from synopsys is the sign-off tool in industry.
it is industry and fab std for STA signoff

verilog_coder

Joined: 04 Jan 2006
Posts: 68
Helped: 6
Location: Pakistan

30 Jan 2006 8:23 Static Timing Analysis - Synopsys & Cadence

Does mentor provide any such tool??

cheelgo

Joined: 23 Nov 2004
Posts: 84
Helped: 3

30 Jan 2006 9:40 Static Timing Analysis - Synopsys & Cadence

I don't thinkd Mentor provide such kind of sign-off tool.

zhustudio

Joined: 15 Jul 2002
Posts: 104
Helped: 6
Location: China

02 Feb 2006 14:04 Static Timing Analysis - Synopsys & Cadence

RTL compiler and SOC Encounter has a timing engine called Common Timing Engine (CTE). It is powerful. Cadence said it can be sign-off tool for TSMC and other many foundries. We use CTE for timing. It is fine. PT is more pessimistic than CTE. Anyway, the silicon is fine. So we can trust CTE.

coolrak

Joined: 16 Aug 2005
Posts: 74
Helped: 4

02 Feb 2006 14:26 Re: Static Timing Analysis - Synopsys & Cadence

Mentor has a tool called SSTVelocity for STA. There are other good tools but I can tell

one thing. In a recent survey Synopsy PrimeTime has got 98% market share in the

Industry

Kulprashant

Joined: 28 Mar 2005
Posts: 59
Helped: 2

03 Feb 2006 5:19 Re: Static Timing Analysis - Synopsys & Cadence

Hi,
it depends on the requirements of the projects.

Synopsys : Prime Time
cadence : Common Time Engine (CTE)
Magma : Blast fusion (not sure)

I worked on CTE and it is one of the best tool but still Prime Time is used by all company.

Prashant

Manjunatha_hv

Joined: 03 Aug 2005
Posts: 716
Helped: 105
Location: INDIA

03 Feb 2006 5:41 Re: Static Timing Analysis - Synopsys & Cadence

Hello,

Incentia Time Craft is also one of the good STA tool...

http://www.incentia.com/products/index.htm#timecraft

TimeCraft™

--------------------------------------------------------------------------------

TimeCraft is a full-chip, gate-level static timing analyzer (STA). It can be used for timing verification at any stage in the design process and for final timing signoff, as shown in the Figure below.

TimeCraft offers rich sign-off features for analyzing a large variety of design applications, including, networking, wireless, communications, chip-sets, and consumer electronics.

---manju---

incisive

Joined: 22 Jul 2005
Posts: 79
Helped: 4

08 Feb 2006 7:23 Re: Static Timing Analysis - Synopsys & Cadence

Yes there is a tool called Static Timing Analyzer, But it is inbuilt in Xilinx FPGA Tool, Donno if it is seperatley availaible.

AlexWan

Joined: 26 Dec 2003
Posts: 305
Helped: 6

08 Feb 2006 9:38 Static Timing Analysis - Synopsys & Cadence

The result of CTE can be signoff directly. There are some sucessful examples in Cadence.

maks10

Joined: 09 Jun 2005
Posts: 49
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Location: Bangalore, India

08 Feb 2006 11:34 Re: Static Timing Analysis - Synopsys & Cadence

what abt the timing engine in design compiler

carrot

Joined: 23 Feb 2004
Posts: 173
Helped: 3
Location: Bangalore, India

10 Feb 2006 8:57 Re: Static Timing Analysis - Synopsys & Cadence

Hi,

Is Common Time Engine(STA tool) of cadence a part of Buildgates or is it a separate tool, Because we have access to buildgates, but i don't know how to do STA. Can anyone who have done STA please guide me. I need to know what are all the things that i should look for in STA. Is is only Setup and Hold time? or anything else.