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About the nmos on a deep-nwell in TSMC 0.18um process...

 
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cqmyg5



Joined: 21 Oct 2003
Posts: 137
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Post24 Jan 2006 5:19   About the nmos on a deep-nwell in TSMC 0.18um process...

I find there're a deep-nwell nmos in TSMC 0.18u MS process, could we consider this deep-nwell nmos an isolated nmos? so it has no body-effect when its substrate connects to its source?
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ambreesh



Joined: 21 Feb 2005
Posts: 368
Helped: 21


Post24 Jan 2006 5:22   Re: About the nmos on a deep-nwell in TSMC 0.18um process...

Yes, a DNW would provide you with A NMOS that could have its source and bulk at same potential.
I would still suggest use it in dire necessity, the silicon area it consumes is huge.
And they are a pain for the layout engineers if area reduction has to be done
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