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voho
Joined: 24 Feb 2004 Posts: 105
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09 Nov 2005 14:05 how to do in vhdl |
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Hi all,
I have 2 inputs A and B and 1 output Q(14:0);
I want to do this in vhdl:
If a=5 and B=10 then Q=000001111111111
Thank's in advance
regards
voho
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nand_gates
Joined: 19 Jul 2004 Posts: 907 Helped: 120
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09 Nov 2005 14:59 Re: how to do in vhdl |
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Here is how to do it!!
| Code: |
library ieee;
use ieee.std_logic_1164.all;
entity my_logic is
port (
A : in std_logic_vector(14 downto 0);
B : in std_logic_vector(14 downto 0);
Q : out std_logic_vector(14 downto 0));
end my_logic;
architecture behave of my_logic is
begin -- behave
process (A,B)
begin -- process
if (a="000000000000101" and B = "000000000001010") then
Q <= "000001111111111";
else
Q <= "000000000000000";
end if;
end process;
end behave; |
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Kukaz
Joined: 09 May 2001 Posts: 30 Helped: 1
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10 Nov 2005 9:21 Re: how to do in vhdl |
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OR SO
library ieee;
use ieee.std_logic_1164.all;
entity my_logic is
port (
A : in std_logic_vector(14 downto 0);
B : in std_logic_vector(14 downto 0);
Q : out std_logic_vector(14 downto 0));
end my_logic;
architecture behave of my_logic is
begin
Q <= "000001111111111" WHEN (a="000000000000101" and B = "000000000001010") ELSE "000000000000000";
end behave;
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10 Nov 2005 9:21 Ads |
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maksya
Joined: 02 Jun 2005 Posts: 172 Helped: 13
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11 Nov 2005 21:37 Re: how to do in vhdl |
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In my opinion, your code needs to be corrected this way:
...
A : in std_logic_vector(2 downto 0);
B : in std_logic_vector(3 downto 0);
...
Q <= "000001111111111" WHEN (a="101" and B = "1010") ELSE
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