LUT(lookup table) in FPGA can be implemented in ASIC?

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feel_on_on

Joined: 29 Apr 2005
Posts: 260
Helped: 1

18 Jul 2005 14:22 look up table in asic

LUT(lookup table) in FPGA can be implemented in ASIC? Sum of Product with LUT in ASIC?

freeinthewind

Joined: 20 Oct 2004
Posts: 108
Helped: 1

19 Jul 2005 3:52 lookup tables in asic

LUT can not be implemented in ASIC. LUT is special in FPGA.

feel_on_on

Joined: 29 Apr 2005
Posts: 260
Helped: 1

21 Jul 2005 2:54 LUT(lookup table) in FPGA can be implemented in ASIC?

how to implement sum of product in ASIC?

Renjith

Joined: 03 Jan 2005
Posts: 179
Helped: 9
Location: India

21 Jul 2005 14:04 Re: LUT(lookup table) in FPGA can be implemented in ASIC?

freeinthewind wrote:

LUT can not be implemented in ASIC. LUT is special in FPGA.

if so, how did they manage to put it inside the FPGA?

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checkmate

Joined: 25 Feb 2004
Posts: 489
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Location: Toilet Seat

21 Jul 2005 15:55 Re: LUT(lookup table) in FPGA can be implemented in ASIC?

FPGAs are basically arrays of logic elements, where the lookup table (usually implemented in some form of EEPROM) forms part of the logic element, and this handles all combinational logic. Any combinational logic can be implemented by just simply programming this lookup EEPROM.
In ASICs, combinational logic is handled using real logic gates. So from a lookup table, you optimize it using methods like karnaugh maps and just provide the HDL code for it.

eelxl

Joined: 27 Jul 2005
Posts: 5

28 Jul 2005 9:05 Re: LUT(lookup table) in FPGA can be implemented in ASIC?

LUT can be implemented easily in VHDL. Just generate this table in your library and use it directly in your code. Tests show that this method uses minimum silicon area.
Best idea: change any other logic into LUT and you will see the difference.