electronics forum

Rules | Recent posts | topic RSS | Search | Register  | Log in

UART in verilog
Post new topic  Reply to topic    EDAboard.com Forum Index -> PLD, SPLD, GAL, CPLD, FPGA Design -> UART in verilog
Author Message
syedahmar



Joined: 26 May 2005
Posts: 36
Helped: 2
Post08 Jun 2005 15:25   

UART in verilog
Hello all!!
i have been given a task of implementing a serial interface between an I/O device and a CPU and for that i have to basically implement a UART...
Can u guys tell me where can i get a complete detail fo what basically is a UART, that is how does it function and what are its requirements..
Please tell me the sources so that i can study them and first of all i can understand as to how can i design a UART ....help plz....
Back to top
Google
AdSense
Google Adsense
Post08 Jun 2005 15:25   

Ads


Back to top
maksya



Joined: 02 Jun 2005
Posts: 172
Helped: 13
Post08 Jun 2005 23:34   

Re: UART in verilog
UART - universal asynchronous receiver / transmitter

You can find some tutorials here:

http://jamesthornton.com/freebsd/articles/serial-uart/
http://www.lammertbies.nl/comm/info/serial-uart.html

And additionally I attached specification from Actel corp. You can find similar models from many vendors...

As for realization of UART using HDL - I have such model, but it is written on VHDL. I can upload it if you want.

By the way, you can find a lot of information and finished HDL models in Internet, because this component is very popular.

Sorry, but you need login in to view this attachment
Back to top
Arabic versionBulgarian versionCatalan versionCzech versionDanish versionGerman versionGreek versionEnglish versionSpanish versionFinnish versionFrench versionHindi versionCroatian versionIndonesian versionItalian versionHebrew versionJapanese versionKorean versionLithuanian versionLatvian versionDutch versionNorwegian versionPolish versionPortuguese versionRomanian versionRussian versionSlovak versionSlovenian versionSerbian versionSwedish versionTagalog versionUkrainian versionVietnamese versionChinese version
Post new topic  Reply to topic    EDAboard.com Forum Index -> PLD, SPLD, GAL, CPLD, FPGA Design -> UART in verilog
Page 1 of 1 All times are GMT + 1 Hour
Similar topics:
UART VERILOG MODEL (17)
Uart design in verilog (3)
Mini UART verilog code (4)
UART verilog for shift register (3)
Communication Controller >> Serial UART in Verilog Nee (1)
what r the differences between UART & ENHANCED UART (1)
UART - Can I read data coming from a uart port (2)
I want UART to UART baud rate converter. (6)
UART problem.... - UART and the digital IO (1)
Looking for (UART to SPI / SPI to UART) with PIC (3)


Abuse || Administrator || Moderators || Support us || sitemap
topic RSS