| Author |
Message |
jay_ec_engg
Joined: 19 Jun 2004 Posts: 157 Helped: 1 Location: India
|
08 Apr 2005 8:06 How can I find Rise/fall time of xilinx FPGA? |
|
|
|
|
| How can I find rise and fall time of output signals from XILINX FPGA ? Will it generate any file after synthesis which will provide this sinformation ?
|
|
| Back to top |
|
 |
hill
Joined: 17 Jun 2004 Posts: 285 Helped: 9
|
08 Apr 2005 10:06 How can I find Rise/fall time of xilinx FPGA? |
|
|
|
|
| My method is using digital oscilloscope (Yokogawa DL1540).
|
|
| Back to top |
|
 |
Johnson
Joined: 04 Oct 2004 Posts: 730 Helped: 22
|
08 Apr 2005 10:07 Re: How can I find Rise/fall time of xilinx FPGA? |
|
|
|
|
| on Xilinx main datasheet, which is available on site! The fields on datasource CD is not complete!
|
|
| Back to top |
|
 |
jay_ec_engg
Joined: 19 Jun 2004 Posts: 157 Helped: 1 Location: India
|
08 Apr 2005 13:59 Re: How can I find Rise/fall time of xilinx FPGA? |
|
|
|
|
| I have to do timing analysis for output signals from spartan-3 fpga before actual testing (before board comes). So i cant use oscilloscope. Datasheet also doesnt have rise/fall time information. Can I get this info from any of the report file after synthesis ?
|
|
| Back to top |
|
 |
Google AdSense

|
08 Apr 2005 13:59 Ads |
|
|
|
|
|
|
| Back to top |
|
 |
au_sun
Joined: 05 Aug 2004 Posts: 148 Helped: 10
|
08 Apr 2005 18:52 Re: How can I find Rise/fall time of xilinx FPGA? |
|
|
|
|
u get rise time and fall time information from the REPORT after XST synthesis,
the report contains MAX frequency, and all other timing estimates for the I/O signals of the design
|
|
| Back to top |
|
 |
power-twq
Joined: 10 Jun 2005 Posts: 374 Helped: 3
|
18 Jun 2005 14:31 Re: How can I find Rise/fall time of xilinx FPGA? |
|
|
|
|
The rise and fall time is determined by fpga output's drive ability and
capacitance loading (pcb trace, etc.). you may not find it after synthesis.
but you can find it after PCB simulation.
best regards
| jay_ec_engg wrote: |
| How can I find rise and fall time of output signals from XILINX FPGA ? Will it generate any file after synthesis which will provide this sinformation ? |
|
|
| Back to top |
|
 |