Why PMOS used in LDO more than NMOS?

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hktk

Joined: 02 Feb 2005
Posts: 25
Helped: 2

17 Feb 2005 14:12 nmos ldo

due to the lower Rout?

vfone

Joined: 10 Oct 2001
Posts: 2332
Helped: 328

17 Feb 2005 14:49 ldo nmos

Lower Ron resistance
http://www.fairchildsemi.com/ms/MS/MS-556.pdf

bunalmis

Joined: 03 Jan 2003
Posts: 254
Helped: 5
Location: Turkey

17 Feb 2005 16:21 pmos over nmos for ldo

At the negative ground PMOS has advantages becouse,

NMOS Gate voltage must be high than Vin (Vin + Vthreshold)

But at the Pmos Vthreshold voltage lower than Vin.

But if you use positive gnd NMOS has advantages.

hktk

Joined: 02 Feb 2005
Posts: 25
Helped: 2

18 Feb 2005 3:10 nmos ldo compensation

but in Low Drop-Out Regulator, Pmos is used to achieve lower voltage drop. how can Pmos do that other than Nmos?it seems that lower Ron is not the reason.

andy2000a

Joined: 18 Jul 2001
Posts: 767
Helped: 7

18 Feb 2005 3:23 what nmos is used for ldo output device

I have another problem is
if use OPA + pmos for LDO , pmos output
use "drain" output ,
I think use Nmos have low output impedance

lastdance

Joined: 01 Feb 2005
Posts: 105
Helped: 17
Location: Singapore

18 Feb 2005 3:41 n mos signal gain

when you have VIN about the same as VOUT, PMOS is the natural choice. NMOS must have a VGS drop which means VOUT cannot be nearer to VIN by less than VGS.

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18 Feb 2005 3:41 Ads

sergeyr77

Joined: 22 Oct 2004
Posts: 32
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18 Feb 2005 19:40 nmos vs pmos regulator poles

Use the same trend as in CMOS: PMOS pass VDD well (precharge to VDD) and GND bad, NMOS pass GND well ( discharge to GND) and VDD bad. In this case Vin is VDD. You can make Ron as low as you want.

leonwang

Joined: 06 Dec 2004
Posts: 17
Location: Tianjin

19 Feb 2005 2:39 ldo pmos nmos

I agree with sergeyr77.

As a switch, PMOS often let the VDD pass.
However, NMOS let the gnd pass.

kwkam

Joined: 25 Feb 2002
Posts: 299
Helped: 15
Location: Somewhere on earth

19 Feb 2005 16:09 pmos ldo

I have any point of view, use NMOS in LDO more easier latchup than PMOS.

alchen77

Joined: 09 Jan 2005
Posts: 25
Helped: 1

19 Feb 2005 16:51 common source pmos regulators

kwkam wrote:

I have any point of view, use NMOS in LDO more easier latchup than PMOS.

can you explain more clear?? thanks very much!

Vamsi Mocherla

Joined: 06 Sep 2004
Posts: 482
Helped: 62

20 Feb 2005 16:30 pmos nmos 出力抵抗

PMOS device is usually used in a common source configuration and hence a Low voltage drop of VDSsat. While NMOS device is used in a Sorce follower configuration and hence causes a VGS drop in additional to the VDSsat required to drive it. Hence PMOS is the best choice.

yuiko

Joined: 20 Feb 2005
Posts: 4

20 Feb 2005 21:25 why do pmos is used as pass transistor in ldo

because you can reduce output voltage with one Vgs

ambreesh

Joined: 21 Feb 2005
Posts: 369
Helped: 21

02 Mar 2005 9:49 how is an ldo used

1 A regulator needs to have high efficiency. For LDO' voltage efficiency is more critical. To have more voltage efficiency, difference between Vout and Vin must be less. This can go down to VDsat for a common source configuration rather than source follower configuration. Assumption Vout very close to Vin

2. Example vout =1.8V Vin=5V, use NMOS as pass device, higher mobility, lower W/L thus smaller capacitance, fast responce at output, larger bandwidth. Remember the output swing of the amplifier and the modfied Vth of power MOS and Vout shall decide your overdrive.
All is finally trade off

Tianlei

Joined: 31 Oct 2004
Posts: 16

05 Mar 2005 16:47 voltage drop on pmos

Another thought, PMOS(CS configuration) can provide much more open loop gain than NMOS(CD configuration), so less output error.

yeewong_su

Joined: 12 Oct 2004
Posts: 126
Helped: 3

06 Mar 2005 4:36 pmos nmos voltage drop

for pmos can provide the output voltage high as vdd

ambreesh

Joined: 21 Feb 2005
Posts: 369
Helped: 21

07 Mar 2005 6:53 voltage drop in pmos

Dear Tianlei,
Their is a catch in that.
your gain is gm *Rout
Rout is paralle combination of feedbak resistors, rds of PMOS and teh load.
Now the load is usually a very small reisstance e.g Iout=200mA Vout=2V then load resistance is 20Ω. (full load case)
Usually one would observe gain reduction in full-load condition

Tianlei

Joined: 31 Oct 2004
Posts: 16

07 Mar 2005 9:41 pass device ldo pmos or nmos

The 20ohm resistance is the DC impedence. In this calculation, AC impedence should be used.
e.g. a 200mA current source is connected to the output of LDO, It s AC impedence is infinite.

My concern is: if using so small AC resistence at the output of LDO, it will move the dominate pole to very high frequency, impact the stability.

ambreesh

Joined: 21 Feb 2005
Posts: 369
Helped: 21

07 Mar 2005 10:07 ldo with pmos pass gate

You do use a large cap at output to stabalize your LDO, usually micro farad.
Yes the current source would have ideally infinite AC impedance but the we do have this large cap shunting it.
And a current source having a fixed voltage across it can be replaced by a resistor.
The reduction in error due to large gain one does concider DC gain
If I have lost you point some where please explain that

Tianlei

Joined: 31 Oct 2004
Posts: 16

08 Mar 2005 8:47 what is a pmos used for

First, the gain should be small signal analysis.

AC impedance refer to the small signal impedance, it range from 0 to infinite Hz. We should use this impedance in the gain analysis.
The DC gain should be the small signal gain at 0 Hz.

Current source has the same large signal impedance as resistor, but has different small signal iimpedance.

muldersun

Joined: 03 Dec 2003
Posts: 41
Helped: 2

08 Mar 2005 13:26 rds on pmos

PMOS: lower drop-out voltage
If you want to use nmos, you must choose charge-pump circuit.

mady79

Joined: 30 Mar 2004
Posts: 88
Helped: 6

09 Mar 2005 5:31 ldo nmos output

I think using Pmos or Nmos depends on the output voltage one is trying to generate .Since the Nmos pass transistor one can go for a dominant pole compensation rather then going for LDO compensation taking ESR into effect .
In low supplies one would go for PMOS for effiency/low drop out .