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LUT RAMS--virtex4 how to implement
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chaitu2k



Joined: 27 Apr 2004
Posts: 58
Helped: 1
Post08 Feb 2005 5:14   

ram_style=distributed
hi all

i want to implement 16 bit and 28 bit wide memory using LUT RAM...i dont want to use BLOCK RAM using core generator.....

can anyone tell me how or forward some document which gives an insight on how to do so...

cheers
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echo47



Joined: 07 Apr 2002
Posts: 4206
Helped: 566
Post08 Feb 2005 7:15   

LUT RAMS--virtex4 how to implement
Search the Xilinx Constraints Guide for RAM_STYLE DISTRIBUTED.

Here's a Verilog example:
reg [27:0] myram [0:15]; // synthesis attribute RAM_STYLE myram "DISTRIBUTED";

Good luck!
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vomit



Joined: 14 Jun 2002
Posts: 151
Helped: 10
Post08 Feb 2005 11:53   

Re: LUT RAMS--virtex4 how to implement
Just select the appropriate CoreGen module...

Distributed Memory v7.1

Data sheet: DS230 January 18, 2005
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Post08 Feb 2005 11:53   

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preet



Joined: 10 Jan 2005
Posts: 91
Helped: 2
Post09 Feb 2005 14:51   

Re: LUT RAMS--virtex4 how to implement
hello,
u must see "xilinx language template" and there u find how to implement distributed RAM and BLOCK RAM
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