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M4A5 32/32 Lattice CPLD


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plsiu



Joined: 07 Jul 2004
Posts: 6


Post19 Jan 2005 12:37   

m4a5 cpld


Dear all,
I am using the ispVMR system to download the bit stream file into the M4A5 cpld device but I am using the xilinx parallel download JTAG cable, it always shows cannot detect the device. Do you thik their download cable is not compatiable to use??

Thanks much
plsiu
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Post19 Jan 2005 12:37   

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lucbra



Joined: 30 Oct 2003
Posts: 161
Helped: 6
Location: Belgium


Post21 Jan 2005 19:26   

computer not detecting lattice cable


Hi,

I know that Xilinx is not so flexible as Lattice when it comes to programming. The Lattice download cable and ispVM sees other devices as well as the M4A5. The problem might also be that you are using a Xilinx download cable with the Lattice software. It's possible that the incompatibility can be found there.

Regards
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Buriedcode



Joined: 06 May 2004
Posts: 327
Helped: 34
Location: London


Post11 Feb 2005 18:28   

Re: M4A5 32/32 Lattice CPLD


I've used that CPLD before with no problems.

Using a Xilinx cable is most likely the cause of the problem you're having. Although most DL cables (dongles) these days are pretty similar (they all use a simple buffer, like the 74**244) they have slightly different connections to the parallel port. I suggest building one, they're pretty straight-forward.

I couldn't afford to buy it (read somewhere its $50) and I had real trouble finding the schematic for the lattice DL cable, which IMO should be given out for free (like altera, xilinx etc..) thankfully someone on this board was kind enough to provide me with this.

You can omit the 'reset', 'ispEN', and 'JTAG' lines, and the 74HC00, as we are not dealing with an 'ispEN' device, just a JTAG one which is what the MACH4A5 uses.

I have no less than 6(!) schematics for the lattice cable, all are different, and use different pins on the printer port. I *think* this is the one I used. If you can't make one, then I'll try and post modifications for the 'Xilinx' cable, so you can switch the cable for programming xlinx, and lattice devices. If you can't get this schematic working, I'll reverse engineer the one I made (lost the designs I made).

Good luck, and sorry if this wasn't much help, I just wanted to post as much info as possible so you didn't have to keep posting replys.


BuriedCode,

Ps. Although I've built this, and ispVM 'says' it works fine, I've yet to get any project of mine working Sad but I don't think this is due to the DL cable, just my terrible board design,



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Hero



Joined: 06 Mar 2002
Posts: 145
Helped: 2


Post29 Apr 2005 2:49   

Re: M4A5 32/32 Lattice CPLD


Hi,

JTAG is standard but every vendor use their own cables and conector mappings.

Also different cables have different inducatance, capacitance and timming parameters. Input and output logic levels are also important esspecially in 3.3V and 5V mixed designs.

Programming software assumes some timing parameters and appropraite level conversions if all of these conditions are not satisfied you will not detect chip with programming software.
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