| Author |
Message |
yyliang
Joined: 26 Aug 2004 Posts: 43
|
19 Jan 2005 4:08 How to simulate the offset of clocked comparator? |
|
|
|
| How to simulate the offset of clocked comparator?
|
|
| Back to top |
|
 |
uladz55
Joined: 11 Mar 2004 Posts: 161 Helped: 6
|
19 Jan 2005 8:40 Re: How to simulate the offset of clocked comparator? |
|
|
|
Hi,
you can just add to the input a DC voltage source component with a DC voltage equals to your offset voltage.
|
|
| Back to top |
|
 |
totoro
Joined: 27 Jun 2004 Posts: 85 Helped: 10
|
19 Jan 2005 10:48 Re: How to simulate the offset of clocked comparator? |
|
|
|
| do monte carlo analysis
|
|
| Back to top |
|
 |
cetc1525
Joined: 08 Oct 2004 Posts: 177 Helped: 3
|
19 Jan 2005 13:53 How to simulate the offset of clocked comparator? |
|
|
|
when i simulate the gain of a single voltage erramp, the two input bias voltages are different,just as 2V&2.045V.
Is the difference of the voltages(0.045V) the offset voltage ?
|
|
| Back to top |
|
 |
jiangwp
Joined: 27 Jul 2004 Posts: 184 Helped: 9
|
19 Jan 2005 14:20 Re: How to simulate the offset of clocked comparator? |
|
|
|
Make the latch is short with the clock enable.
measure the difference voltage of the two ports of output.
Because the comparator is configured unit gain when the clock enable, so the difference voltage is the offset .
|
|
| Back to top |
|
 |