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rkarthik1
Joined: 29 Oct 2004
Posts: 38
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 03 Jan 2005 17:06 Gate level implementation |
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| i want to know if there is a way to find out the total no. of transistors in say a 16-bit Wallace-Tree multiplier or a Carry-Save Multiplier? say an algorithm that can give me the no. of transistors for any n-bit multiplier.. adder.. so on.. i cant think of any method without going right down to the basics.. which is too cumbersome..
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arthur
Joined: 03 May 2001
Posts: 16
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| 04 Jan 2005 16:28 Re: Gate level implementation |
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Suggestion:
Use synopsys "Design ware" to implement a multiplier.
Report area--> Get the answer!
(Note: The area report has different unit scale, it depend on lib.
Maybe um2, gate, cell...)
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geconom
Joined: 12 Feb 2002
Posts: 295
Helped: 3
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| 04 Jan 2005 22:23 Re: Gate level implementation |
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| I am using design compiler to do this work. Generally, it is a matter of tools, not algorithms.
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vale
Joined: 07 Jan 2004
Posts: 112
Helped: 8
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| 05 Jan 2005 2:31 Gate level implementation |
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| Both Wallace-Tree multiplier and Carry-Save Multiplier have regular structure, so you can easily caluculate the numbers of basic module (full-adder, half-adder, AND). Check the transistor numbers of each module in your lib and get the total.
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spauls
Joined: 17 Dec 2002
Posts: 547
Helped: 19
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| 05 Jan 2005 11:32 Re: Gate level implementation |
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| Try to get netlist from diff Syn tools , and then compare results
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abhigopal
Joined: 21 Dec 2004
Posts: 62
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| 07 Jan 2005 22:01 Gate level implementation |
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i read somewhere that the total number of devices in a n bit multiplier is n*n-1*gate count of 1 full adder * no.of devices per gate
hope this helps
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