triquent
Joined: 13 Oct 2004
Posts: 166
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 10 Dec 2004 0:56 Q about allen&Holberg cmos analog circuit design homewor |
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I am studying the Allen/holberg Cmos Analog Circuit Design textbook. I am doing the Chap4 homework p4.3-5,4.3-6,4.3-7,4.3-8. I am so confused about these homework. what exactly do they want us to do? i want to know if what i understood is correct.
ex. p4.3-5. 1) first calculate the output resistance and minimum output voltage. using table 3.1-2 values.
2)simulate the iout vs. vout by hspice level3 model using table 3.4-1. But in table 3.4-1, the cgd0, cgs0 is not the level3 parameters.
also determine the actual output current from the simulation results?
3)assume that iout is actually 10uA. what does this mean? means when simulation using this assumption?
4) i tried to simulate, i think the simulation results should be very similar to the figure 4.3-5 p131? but what i got at the linear region is not so smooth. I don't know if the modle is wrong, or the circuit is wrong?
5) when i do simulation, what power supply voltage should i apply to the left constant current source(10uA), or the left and right(output) should be the same, do the power supply sweep?
where can we find the allen textbook answer.
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