1. Announcement:
    Forum rules & policies (quick reference)
    alexan_e (Administrator)
    7th August 2014
    Views:
    91,816
Page 1 of 612 1 2 3 11 51 101 501 ... LastLast
Threads 1 to 30 of 18357

Forum: Analog Integrated Circuit (IC) Design, Layout and Fabrication

Analog Integrated Circuit Design, Layout & Fabrication Questions. Analog ASIC Design. Semiconductor Technology Issues.

  1. Sticky Thread Sticky: Featured Reference Designs

    Started by mmatheson, 16th June 2016 22:04
    • Replies: 0
    • Views: 3,835
    16th June 2016, 22:04 Go to last post
  2. Sticky Thread Sticky: Read this before posting

    Started by klug, 3rd December 2007 18:00
    • Replies: 0
    • Views: 22,958
    3rd December 2007, 18:00 Go to last post
  1. Error in Post-Layout Simulation

    Started by Ellana, Today 07:47
    • Replies: 0
    • Views: 1
    Today, 07:47 Go to last post
  2. Ocean Script for differential amplifier

    Started by Narakiran, 20th June 2017 05:40
    2 Pages
    1 2
    • Replies: 28
    • Views: 961
    Today, 05:25 Go to last post
  3. MIMCAP_130MML130n connection

    Started by zyadzezo, Yesterday 19:28
    • Replies: 1
    • Views: 217
    Today, 00:29 Go to last post
  4. [Moved]: calibre pex output additional parameter

    Started by Sapling, 21st June 2017 09:02
    • Replies: 5
    • Views: 476
    Yesterday, 17:49 Go to last post
  5. Gyrator implementation of chip inductor

    Started by promach, 24th June 2017 15:30
    • Replies: 2
    • Views: 580
    25th June 2017, 13:36 Go to last post
  6. [SOLVED] PTM-MG hspice model for finfet

    Started by Bakr.hesham, 18th June 2017 14:18
    • Replies: 4
    • Views: 368
    24th June 2017, 20:19 Go to last post
  7. On and Off current in cadence

    Started by Bakr.hesham, 24th June 2017 12:36
    • Replies: 7
    • Views: 184
    24th June 2017, 14:38 Go to last post
  8. Moved: find the maximum value of a signal during a period

    Started by hanikapa, 23rd June 2017 11:13
    •  
    •  
  9. Error while running post layout simulation

    Started by sameh.abdelbadie, 21st June 2017 14:16
    • Replies: 1
    • Views: 694
    22nd June 2017, 20:26 Go to last post
  10. CMOS two stage amplifier 0.8um technology

    Started by thaintrinh, 10th June 2017 10:48
    • Replies: 15
    • Views: 1,511
    22nd June 2017, 19:47 Go to last post
  11. Voltage Dependent Metal Spacing DRC coding

    Started by Sanketp20, 21st June 2017 23:14
    • Replies: 1
    • Views: 295
    22nd June 2017, 13:11 Go to last post
  12. [SOLVED] PTM model card for low-power applications

    Started by Bakr.hesham, 21st June 2017 10:42
    • Replies: 2
    • Views: 199
    21st June 2017, 17:39 Go to last post
    • Replies: 0
    • Views: 218
    20th June 2017, 19:22 Go to last post
  13. Package and Testing of LDO

    Started by JZJIANG, 30th March 2017 07:38
    • Replies: 1
    • Views: 564
    20th June 2017, 19:15 Go to last post
  14. nwell resisor inside n guard ring

    Started by maths, 19th June 2017 17:31
    • Replies: 2
    • Views: 385
    20th June 2017, 07:49 Go to last post
  15. Moved: Wifi ESP8266 with FIREBASE DATABASE

    Started by nis2311, 20th June 2017 06:46
    •  
    •  
  16. Convenient Model card for BSIM-IMG code

    Started by Bakr.hesham, 19th June 2017 02:20
    • Replies: 1
    • Views: 300
    19th June 2017, 14:38 Go to last post
  17. Moved: Time to digital converter design for DPLL

    Started by hanikapa, 17th June 2017 10:44
    •  
    •  
    • Replies: 3
    • Views: 1,236
    17th June 2017, 06:23 Go to last post
  18. cmos parameters mismatch analysis in ADS

    Started by mohsen941, 13th June 2017 21:02
    • Replies: 2
    • Views: 610
    15th June 2017, 04:16 Go to last post
  19. [SOLVED] Finfet AC Analysis unexpected results

    Started by Bakr.hesham, 12th June 2017 14:29
    • Replies: 6
    • Views: 611
    13th June 2017, 18:19 Go to last post
  20. Moved: how to calculate jitter when simulating the PLL

    Started by Kristya, 12th June 2017 09:04
    •  
    •  
  21. Moved: layout of buck converter

    Started by manabe, 11th June 2017 06:42
    •  
    •  
  22. Moved: Phase locked loop jitter at 1GHz

    Started by hanikapa, 9th June 2017 20:56
    •  
    •  
    • Replies: 2
    • Views: 745
    9th June 2017, 18:39 Go to last post
  23. Bad component subtype

    Started by venkatanalog, 7th June 2017 11:31
    • Replies: 3
    • Views: 508
    8th June 2017, 16:23 Go to last post
  24. [SOLVED] Sub conncection on BJT on ams35

    Started by Hesam2sh, 1st June 2017 12:59
    • Replies: 2
    • Views: 1,654
    8th June 2017, 09:10 Go to last post
  25. Moved: PCB Artist-layer change

    Started by optic_ali_optic, 8th June 2017 05:05
    •  
    •