1. Announcement:
    Forum rules & policies (quick reference)
    alexan_e (Administrator)
    7th August 2014
    Views:
    98,385
Page 1 of 618 1 2 3 11 51 101 501 ... LastLast
Threads 1 to 30 of 18519

Forum: Analog Integrated Circuit (IC) Design, Layout and Fabrication

Analog Integrated Circuit Design, Layout & Fabrication Questions. Analog ASIC Design. Semiconductor Technology Issues.

  1. Sticky Thread Sticky: Featured Reference Designs

    Started by mmatheson, 16th June 2016 22:04
    • Replies: 0
    • Views: 6,693
    16th June 2016, 22:04 Go to last post
  2. Sticky Thread Sticky: Read this before posting

    Started by klug, 3rd December 2007 18:00
    • Replies: 0
    • Views: 25,832
    3rd December 2007, 18:00 Go to last post
    • Replies: 6
    • Views: 429
    Yesterday, 19:29 Go to last post
  1. [SOLVED] PTM-MG hspice model for finfet

    Started by Bakr.hesham, 18th June 2017 14:18
    • Replies: 7
    • Views: 960
    Yesterday, 18:08 Go to last post
  2. 7nm nmos with level 54

    Started by GayatriGaikwad, Yesterday 12:22
    • Replies: 0
    • Views: 60
    Yesterday, 12:22 Go to last post
    • Replies: 0
    • Views: 83
    Yesterday, 11:59 Go to last post
  3. Effect of high temperature on cntfet

    Started by tejashrimane, Yesterday 08:30
    • Replies: 1
    • Views: 121
    Yesterday, 10:12 Go to last post
  4. Triple pole analog switch by cmos ?

    Started by Electric_Shock, 17th November 2017 09:33
    • Replies: 2
    • Views: 438
    21st November 2017, 19:26 Go to last post
  5. Moved: Leakage current and mobility in hspice

    Started by GayatriGaikwad, 21st November 2017 22:59
    •  
    •  
  6. High Voltage Technology file

    Started by deardeepa76, 31st October 2017 08:07
    • Replies: 5
    • Views: 1,098
    21st November 2017, 14:10 Go to last post
  7. Dummy Generation in Cadence

    Started by bio_man, 11th November 2017 18:43
    • Replies: 15
    • Views: 2,995
    20th November 2017, 16:03 Go to last post
  8. Gain and stability of fully differential Amplifiers

    Started by hannover90, 15th November 2017 21:56
    • Replies: 9
    • Views: 1,531
    17th November 2017, 16:58 Go to last post
  9. Moved: 5v POWER SUPPLY PROBLEM

    Started by dp1311.dp, 17th November 2017 11:59
    •  
    •  
  10. Split Attenuating Cap SAR ADC problem

    Started by elx, 15th November 2017 03:27
    • Replies: 1
    • Views: 611
    15th November 2017, 04:53 Go to last post
  11. Converting Layout in Cadence Virtuoso to GDSII format

    Started by bio_man, 7th November 2017 15:20
    • Replies: 10
    • Views: 1,343
    11th November 2017, 18:45 Go to last post
  12. [SOLVED] Fully Differential Amplifier and output common-mode voltage

    Started by hannover90, 9th November 2017 21:16
    • Replies: 5
    • Views: 1,023
    10th November 2017, 19:42 Go to last post
  13. [SOLVED] Split Attenuation Cap DAC

    Started by elx, 10th November 2017 04:31
    • Replies: 1
    • Views: 640
    10th November 2017, 07:33 Go to last post
  14. [SOLVED] Seal ring stretch help

    Started by kahroba92, 8th November 2017 22:05
    • Replies: 8
    • Views: 833
    10th November 2017, 02:30 Go to last post
  15. Biasing a common-mode level for differential pair

    Started by Electric_Shock, 9th November 2017 05:30
    • Replies: 1
    • Views: 346
    10th November 2017, 02:15 Go to last post
  16. Shielding for the MIM capacitor

    Started by shanmei, 4th November 2017 15:46
    • Replies: 6
    • Views: 945
    10th November 2017, 01:56 Go to last post
  17. Simulating the designed circuit in Tanner EDA

    Started by selvashaashi, 9th November 2017 10:52
    • Replies: 1
    • Views: 341
    10th November 2017, 01:50 Go to last post
  18. Couldn't plot dc gain in cadence

    Started by shanmathi, 1st November 2017 16:02
    • Replies: 4
    • Views: 1,072
    10th November 2017, 01:47 Go to last post
  19. Hspice waveform problem

    Started by an_82, 9th November 2017 06:45
    • Replies: 3
    • Views: 482
    10th November 2017, 01:45 Go to last post
  20. Moved: bizzare buffer AC response

    Started by mburakbaran, 8th November 2017 18:36
    •  
    •  
  21. How to build a simple MOSFET model

    Started by CAMALEAO, 8th November 2017 08:33
    • Replies: 1
    • Views: 480
    8th November 2017, 17:00 Go to last post
  22. Low power op amp in subthreshold region

    Started by sreelekshmivipin, 23rd October 2017 10:56
    • Replies: 3
    • Views: 1,018
    8th November 2017, 16:37 Go to last post
  23. Core layout separation from IO pads

    Started by saha.123, 25th October 2017 07:10
    • Replies: 3
    • Views: 705
    8th November 2017, 15:47 Go to last post
  24. Moved: Modified PMOS Load Circuitry

    Started by promach, 7th November 2017 12:37
    •  
    •  
  25. [SOLVED] LVS weird problem in Cadence

    Started by bio_man, 6th November 2017 00:14
    • Replies: 5
    • Views: 758
    7th November 2017, 14:47 Go to last post
    • Replies: 4
    • Views: 1,239
    7th November 2017, 02:58 Go to last post
  26. Corner to Corner variation of Vbe at room temperature

    Started by aryajur, 6th November 2017 19:47
    • Replies: 3
    • Views: 502
    6th November 2017, 22:54 Go to last post
  27. Moved: Analog Sinusoidal Input to Digital Format

    Started by rob42, 6th November 2017 17:59
    •  
    •