1. Announcement:
    Forum rules & policies (quick reference)
    alexan_e (Administrator)
    7th August 2014
    Views:
    106,081
Page 1 of 623 1 2 3 11 51 101 501 ... LastLast
Threads 1 to 30 of 18671

Forum: Analog Integrated Circuit (IC) Design, Layout and Fabrication

Analog Integrated Circuit Design, Layout & Fabrication Questions. Analog ASIC Design. Semiconductor Technology Issues.

  1. Sticky Thread Sticky: [SOLVED] LIN transceivers that save board space & cost

    Started by B. David Miyares, 2nd April 2018 14:01
    • Replies: 0
    • Views: 299
    2nd April 2018, 14:01 Go to last post
  2. Sticky Thread Sticky: Read this before posting

    Started by klug, 3rd December 2007 18:00
    • Replies: 0
    • Views: 27,688
    3rd December 2007, 18:00 Go to last post
  1. MMWave Cross Coupled CMOS VCO Layouts

    Started by Puppet123, Yesterday 20:06
    • Replies: 1
    • Views: 62
    Yesterday, 22:59 Go to last post
  2. Balanced OTA-C cascode IC design

    Started by sherif96, 23rd March 2018 15:03
    3 Pages
    1 2 3
    • Replies: 50
    • Views: 1,905
    23rd April 2018, 19:02 Go to last post
  3. hanging source affects the system output

    Started by chandlerbing65nm, 20th April 2018 22:26
    • Replies: 3
    • Views: 217
    21st April 2018, 19:57 Go to last post
  4. problem with AC operating point analysis

    Started by promach, 21st April 2018 16:07
    • Replies: 1
    • Views: 127
    21st April 2018, 16:22 Go to last post
  5. Common Centroid Capacitor Layout in Cadence

    Started by Puppet123, 17th April 2018 22:22
    • Replies: 3
    • Views: 189
    21st April 2018, 15:26 Go to last post
  6. CMOS active inductor gyrator question

    Started by promach, 21st April 2018 07:57
    • Replies: 3
    • Views: 173
    21st April 2018, 15:08 Go to last post
  7. MMWave Layout Issues in CMOS

    Started by Puppet123, 19th April 2018 02:30
    • Replies: 10
    • Views: 330
    21st April 2018, 11:06 Go to last post
  8. VCO gain and tuning range

    Started by posiba, 20th April 2018 08:43
    • Replies: 2
    • Views: 137
    20th April 2018, 13:44 Go to last post
  9. Layer definition in TSMC 65nm

    Started by AllenD, 18th April 2018 04:49
    • Replies: 2
    • Views: 175
    20th April 2018, 10:35 Go to last post
  10. Mismatch simulation Schematic vs. Layout

    Started by DefconNowhere, 19th April 2018 16:23
    • Replies: 2
    • Views: 157
    20th April 2018, 08:59 Go to last post
    • Replies: 3
    • Views: 148
    19th April 2018, 23:13 Go to last post
    • Replies: 8
    • Views: 1,136
    19th April 2018, 18:31 Go to last post
  11. Abutting transistors in TSMC65nm

    Started by Puppet123, 17th April 2018 22:35
    • Replies: 2
    • Views: 184
    18th April 2018, 20:04 Go to last post
    • Replies: 2
    • Views: 207
    18th April 2018, 18:55 Go to last post
    • Replies: 8
    • Views: 448
    18th April 2018, 08:03 Go to last post
    • Replies: 3
    • Views: 277
    17th April 2018, 22:28 Go to last post
  12. Long start-up time current reference

    Started by chandlerbing65nm, 17th April 2018 09:03
    • Replies: 2
    • Views: 152
    17th April 2018, 21:06 Go to last post
  13. offset voltage of opamp

    Started by chandlerbing65nm, 17th April 2018 16:33
    • Replies: 2
    • Views: 155
    17th April 2018, 20:57 Go to last post
  14. Current Reference SS problem

    Started by chandlerbing65nm, 15th April 2018 23:57
    • Replies: 1
    • Views: 205
    16th April 2018, 19:06 Go to last post
  15. Current Mirror Inaccuracy

    Started by chandlerbing65nm, 15th April 2018 19:58
    • Replies: 2
    • Views: 223
    15th April 2018, 21:22 Go to last post
  16. Transmission Gate Impedance Problem

    Started by andreneil15, 7th April 2018 05:47
    • Replies: 8
    • Views: 457
    15th April 2018, 03:18 Go to last post
  17. Common Centroid Layout

    Started by Puppet123, 12th April 2018 20:56
    • Replies: 5
    • Views: 374
    14th April 2018, 07:07 Go to last post
  18. Cadence Layout - Interdigitization

    Started by Puppet123, 13th April 2018 23:46
    • Replies: 1
    • Views: 248
    14th April 2018, 04:28 Go to last post
  19. characterizing semiconductors

    Started by Madbunny1, 12th April 2018 19:10
    • Replies: 2
    • Views: 217
    12th April 2018, 20:41 Go to last post
  20. Current mirror transistor connection

    Started by akbarza, 26th March 2018 12:56
    • Replies: 2
    • Views: 476
    12th April 2018, 15:09 Go to last post