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Threads 21871 to 21900 of 22001

Forum: PLD, SPLD, GAL, CPLD, FPGA Design

Simple and Complex Programmable Logic Devices from Altera, Cypress, Xilinx. Field Programmable Gate Array. Device specific VHDL/Verilog/SystemC questions.

  1. Closed: Problem with using the "fopen" on Nios

    Started by simonyoyo, 15th April 2003 16:49
    • Replies: 1
    • Views: 4,635
    24th April 2003, 08:40 Go to last post
  2. Closed: help needed:multi-FLEX6000 configuration(PS mode) with a MCU

    Started by cdcll, 24th April 2003 03:52
    • Replies: 0
    • Views: 1,530
    24th April 2003, 03:52 Go to last post
  3. Closed: Req: IP core for Malviono's SAP-1

    Started by guesswho, 22nd April 2003 08:19
    • Replies: 0
    • Views: 1,478
    22nd April 2003, 08:19 Go to last post
  4. Closed: what is the format which file extension name is bsm for cpld

    Started by jergen, 22nd April 2003 06:15
    • Replies: 0
    • Views: 1,914
    22nd April 2003, 06:15 Go to last post
  5. Closed: Xilinx release EDK 3.2 work with ISE5.2i

    Started by leonqin, 21st April 2003 13:59
    • Replies: 0
    • Views: 1,754
    21st April 2003, 13:59 Go to last post
  6. Closed: REQ: Xilinx Virtex II pro example

    Started by nitr8, 18th April 2003 02:10
    • Replies: 5
    • Views: 2,549
    21st April 2003, 06:21 Go to last post
  7. Closed: post-simulation some code problems

    Started by xworld2008, 20th April 2003 02:31
    • Replies: 0
    • Views: 1,719
    20th April 2003, 02:31 Go to last post
  8. Closed: help: about using the Mentor Graphic's FPGA Advantage 5.4

    Started by eruca, 16th April 2003 15:17
    • Replies: 1
    • Views: 2,418
    17th April 2003, 13:10 Go to last post
  9. Closed: X*ilinx ISE 5.2i Service Pack 2 is now available

    Started by kevin.wu, 17th April 2003 07:52
    • Replies: 0
    • Views: 1,629
    17th April 2003, 07:52 Go to last post
  10. Closed: where is ahdl to vhdl converter?

    Started by elcielo, 15th April 2003 14:26
    • Replies: 2
    • Views: 5,139
    16th April 2003, 23:19 Go to last post
  11. Closed: XPORT from xilinx - AHDL to VHDL

    Started by shawndaking, 15th April 2003 14:50
    • Replies: 0
    • Views: 2,551
    15th April 2003, 14:50 Go to last post
  12. Closed: walsh code generation - what is it?

    Started by elcielo, 15th April 2003 14:47
    • Replies: 0
    • Views: 1,872
    15th April 2003, 14:47 Go to last post
  13. Closed: Need help to convert Max+plus schematic!!!

    Started by tsehonkit, 14th April 2003 17:31
    • Replies: 0
    • Views: 1,461
    14th April 2003, 17:31 Go to last post
  14. Closed: How to add Spartan S10PC84 to Xilinx WebPack 5.2?

    Started by hookhook, 10th April 2003 08:24
    • Replies: 4
    • Views: 2,217
    13th April 2003, 08:20 Go to last post
  15. Closed: Need shematic for ACTEL ISP cable for ProASIC/ProASICplus

    Started by VicL, 11th April 2003 10:53
    • Replies: 5
    • Views: 3,186
    13th April 2003, 08:10 Go to last post
  16. Closed: program a spi device via Altera ByteBlaster cable?

    Started by leonqin, 11th April 2003 14:10
    • Replies: 1
    • Views: 2,543
    11th April 2003, 19:11 Go to last post
  17. Closed: Xilinx Virtex questions about parameters(VCCINT,VCCO,VREF..)

    Started by xfpgas, 11th April 2003 05:19
    • Replies: 1
    • Views: 6,061
    11th April 2003, 07:53 Go to last post
  18. Closed: Questions about FPGA clocking

    Started by Maddin, 8th February 2003 17:17
    • Replies: 12
    • Views: 5,313
    11th April 2003, 07:26 Go to last post
  19. Closed: Spartan III - does anyone have any info

    Started by skyglider, 9th April 2003 13:41
    • Replies: 2
    • Views: 1,693
    9th April 2003, 22:42 Go to last post
  20. Closed: looking for ITU-T G.711 standard

    Started by it_boy, 9th April 2003 13:23
    • Replies: 2
    • Views: 2,046
    9th April 2003, 14:31 Go to last post
  21. Closed: xilinx ChipScope Pro 5.2i released

    Started by leonqin, 27th March 2003 04:56
    • Replies: 4
    • Views: 3,158
    8th April 2003, 13:16 Go to last post
  22. Closed: Looking for a free PCI interface core to fit into a CPLD

    Started by Bus Master, 4th April 2003 16:38
    • Replies: 8
    • Views: 5,653
    8th April 2003, 11:10 Go to last post
  23. Closed: Im looking for VOIP VHDL CORE

    Started by godey, 4th April 2003 15:59
    • Replies: 1
    • Views: 1,959
    7th April 2003, 17:59 Go to last post
  24. Closed: Source code for Altera AN295

    Started by leonqin, 28th March 2003 10:53
    • Replies: 2
    • Views: 1,874
    7th April 2003, 14:23 Go to last post
  25. Closed: Programming GAL's and so on

    Started by Prommer, 6th April 2003 11:11
    • Replies: 0
    • Views: 2,002
    6th April 2003, 11:11 Go to last post
  26. Closed: Help me configure Altera SRAM based FPGA

    Started by leonqin, 2nd April 2003 10:07
    • Replies: 1
    • Views: 1,946
    3rd April 2003, 14:06 Go to last post
  27. Closed: What's the detail meaning of "Hot-Swapping"?

    Started by zcq, 3rd April 2003 06:04
    • Replies: 3
    • Views: 2,417
    3rd April 2003, 13:53 Go to last post
  28. Closed: GCLK pins on Xilinx FPGAs

    Started by jgorsk, 31st March 2003 12:29
    • Replies: 8
    • Views: 8,354
    3rd April 2003, 11:52 Go to last post
  29. Closed: @ltera Cyclone power consumption ?

    Started by VladZ, 1st April 2003 10:14
    • Replies: 1
    • Views: 1,841
    3rd April 2003, 05:00 Go to last post
  30. Closed: Where can I get a smc34c60 chip or equivalent ?

    Started by tug, 31st March 2003 12:48
    • Replies: 0
    • Views: 1,873
    31st March 2003, 12:48 Go to last post