1. Announcement:
    Forum rules & policies (quick reference)
    alexan_e (Administrator)
    7th August 2014
    Views:
    98,581
Page 728 of 733 FirstFirst ... 228 628 678 718 726 727 728 729 730 ... LastLast
Threads 21811 to 21840 of 21964

Forum: PLD, SPLD, GAL, CPLD, FPGA Design

Simple and Complex Programmable Logic Devices from Altera, Cypress, Xilinx. Field Programmable Gate Array. Device specific VHDL/Verilog/SystemC questions.

  1. Closed: MP3 player to target an FPGA

    Started by happytronic, 16th May 2003 01:50
    • Replies: 2
    • Views: 2,309
    16th May 2003, 17:59 Go to last post
  2. Closed: Problem programming XC95108

    Started by kras, 14th May 2003 08:11
    • Replies: 3
    • Views: 2,171
    15th May 2003, 07:34 Go to last post
  3. Closed: How can I programme single gates in structure of CPLD orFPGA

    Started by smiga, 14th May 2003 10:39
    • Replies: 0
    • Views: 1,584
    14th May 2003, 10:39 Go to last post
  4. Closed: Any one have s0urcec*de 74LS193 on veri10g

    Started by J_expoler2, 14th May 2003 04:34
    • Replies: 0
    • Views: 1,264
    14th May 2003, 04:34 Go to last post
  5. Closed: Any suggestions on how to fine-tune the FPGA implementation

    Started by jasonxie, 8th May 2003 00:09
    • Replies: 5
    • Views: 1,669
    13th May 2003, 19:33 Go to last post
  6. Closed: SystemView and Xilinx CoreGen

    Started by twinsen, 13th May 2003 08:38
    • Replies: 0
    • Views: 1,818
    13th May 2003, 08:38 Go to last post
  7. Closed: Fraction-N frequency divider

    Started by bjwljh, 12th May 2003 01:34
    • Replies: 1
    • Views: 2,726
    12th May 2003, 07:14 Go to last post
  8. Closed: How to use Modular Design in ISE5.2i?

    Started by it_boy, 9th May 2003 04:43
    • Replies: 1
    • Views: 1,524
    12th May 2003, 06:28 Go to last post
  9. Closed: what development board is good value?

    Started by btbass, 25th April 2003 18:53
    • Replies: 9
    • Views: 2,206
    11th May 2003, 02:38 Go to last post
  10. Closed: Convertor from .jed to .gal file for GAL16V8

    Started by kras, 10th May 2003 08:22
    • Replies: 1
    • Views: 3,928
    10th May 2003, 14:59 Go to last post
  11. Closed: Is anyone familiar with Asynchronous FIFO Implementation?

    Started by arena_yang, 8th April 2003 13:12
    • Replies: 5
    • Views: 4,436
    10th May 2003, 12:36 Go to last post
  12. Closed: Looking for Memory Stick specifications

    Started by ChipMan, 4th April 2003 06:09
    • Replies: 2
    • Views: 2,328
    8th May 2003, 23:19 Go to last post
  13. Closed: What are difference between QuatusII and MaxIIplus

    Started by nattawoot_s, 21st February 2003 07:14
    • Replies: 10
    • Views: 2,570
    8th May 2003, 22:40 Go to last post
  14. Closed: any one have schematic pinout EPM3064

    Started by J_expoler1, 8th May 2003 07:23
    • Replies: 1
    • Views: 2,916
    8th May 2003, 07:42 Go to last post
  15. Closed: Xilinx Forge v3.1.2 needed???

    Started by clever, 7th May 2003 10:57
    • Replies: 1
    • Views: 1,765
    7th May 2003, 16:13 Go to last post
  16. Closed: About FPGA Internal Core (1.5v) Low Voltage Supply?

    Started by cssheu, 6th May 2003 17:11
    • Replies: 3
    • Views: 2,033
    7th May 2003, 09:47 Go to last post
  17. Closed: How i connect OSC with XC9572

    Started by J_expoler1, 29th April 2003 04:16
    • Replies: 1
    • Views: 1,687
    6th May 2003, 12:31 Go to last post
  18. Closed: Is the Xilinx ISE sw only a temp license?

    Started by bernie75, 18th April 2003 10:30
    • Replies: 3
    • Views: 1,510
    29th April 2003, 06:19 Go to last post
  19. Closed: Schematic Editor for Spartan Family

    Started by mimam, 27th April 2003 16:13
    • Replies: 1
    • Views: 1,862
    28th April 2003, 03:33 Go to last post
  20. Closed: Help. Xilinx ISE4.2 Installation..

    Started by nadamo, 16th April 2003 06:17
    • Replies: 5
    • Views: 4,672
    27th April 2003, 15:03 Go to last post
  21. Closed: Easy to build PAL programmer project

    Started by servopump, 25th April 2003 23:42
    • Replies: 1
    • Views: 4,895
    26th April 2003, 00:24 Go to last post
  22. Closed: Has anybody got ISE5.2i CD?

    Started by leonqin, 12th March 2003 03:16
    • Replies: 16
    • Views: 2,930
    25th April 2003, 06:25 Go to last post
  23. Closed: microblaze evalboard schematics?

    Started by Maddin, 23rd February 2003 15:07
    • Replies: 3
    • Views: 2,232
    24th April 2003, 08:48 Go to last post
  24. Closed: Problem with using the "fopen" on Nios

    Started by simonyoyo, 15th April 2003 16:49
    • Replies: 1
    • Views: 4,624
    24th April 2003, 08:40 Go to last post
  25. Closed: help needed:multi-FLEX6000 configuration(PS mode) with a MCU

    Started by cdcll, 24th April 2003 03:52
    • Replies: 0
    • Views: 1,527
    24th April 2003, 03:52 Go to last post
  26. Closed: Req: IP core for Malviono's SAP-1

    Started by guesswho, 22nd April 2003 08:19
    • Replies: 0
    • Views: 1,469
    22nd April 2003, 08:19 Go to last post
  27. Closed: what is the format which file extension name is bsm for cpld

    Started by jergen, 22nd April 2003 06:15
    • Replies: 0
    • Views: 1,910
    22nd April 2003, 06:15 Go to last post
  28. Closed: Xilinx release EDK 3.2 work with ISE5.2i

    Started by leonqin, 21st April 2003 13:59
    • Replies: 0
    • Views: 1,753
    21st April 2003, 13:59 Go to last post
  29. Closed: REQ: Xilinx Virtex II pro example

    Started by nitr8, 18th April 2003 02:10
    • Replies: 5
    • Views: 2,544
    21st April 2003, 06:21 Go to last post
  30. Closed: post-simulation some code problems

    Started by xworld2008, 20th April 2003 02:31
    • Replies: 0
    • Views: 1,718
    20th April 2003, 02:31 Go to last post