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Threads 21661 to 21690 of 21734

Forum: PLD, SPLD, GAL, CPLD, FPGA Design

Simple and Complex Programmable Logic Devices from Altera, Cypress, Xilinx. Field Programmable Gate Array. Device specific VHDL/Verilog/SystemC questions.

  1. Closed: I/S/E5.1 error: can include constants.v

    Started by hqqh, 25th February 2003 08:34
    • Replies: 4
    • Views: 2,470
    26th February 2003, 10:11 Go to last post
  2. Closed: [FPGA] Spread-Spectrum & Clock Switchover (How to ?)

    Started by joe2moon, 25th February 2003 10:14
    • Replies: 2
    • Views: 2,589
    25th February 2003, 15:31 Go to last post
  3. Closed: Altera Training Course - for PC Users

    Started by brass, 25th February 2003 06:25
    • Replies: 0
    • Views: 2,347
    25th February 2003, 06:25 Go to last post
  4. Closed: How to implement LOGRITHMIC in FPGA without using CORDIC?

    Started by Aircraft Maniac, 23rd February 2003 22:03
    • Replies: 2
    • Views: 2,653
    25th February 2003, 01:14 Go to last post
  5. Closed: Question about two frequencies in USB DPLL design

    Started by snakebites, 24th February 2003 02:30
    • Replies: 2
    • Views: 2,655
    24th February 2003, 07:51 Go to last post
  6. Closed: How to implement Recursion in an FPGA ?

    Started by Aircraft Maniac, 23rd February 2003 21:48
    • Replies: 2
    • Views: 2,451
    24th February 2003, 02:14 Go to last post
  7. Closed: article:A Whitepaper on SRAM FPGA security

    Started by uummcc, 23rd February 2003 13:52
    • Replies: 1
    • Views: 2,286
    23rd February 2003, 15:59 Go to last post
  8. Closed: @ltera: One Hot State Machine vs binary/Gray Code State Mac

    Started by uummcc, 23rd February 2003 14:45
    • Replies: 0
    • Views: 3,030
    23rd February 2003, 14:45 Go to last post
  9. Altera :Multiple Clock System Design

    Started by uummcc, 23rd February 2003 14:36
    • Replies: 1
    • Views: 2,155
    23rd February 2003, 14:40 Go to last post
  10. Closed: How to change the default parameter CLKDV_DIVIDE

    Started by deebar, 23rd February 2003 07:46
    • Replies: 1
    • Views: 2,793
    23rd February 2003, 13:43 Go to last post
  11. Closed: how to demodulate cdma by Xilinx's FPGA, please give

    Started by goodguy1, 22nd February 2003 19:57
    • Replies: 0
    • Views: 1,567
    22nd February 2003, 19:57 Go to last post
  12. Closed: How to use parrel flash ( EEPROM) memory in XILINX FPGA

    Started by ccljpeg, 17th February 2003 08:26
    • Replies: 4
    • Views: 4,039
    22nd February 2003, 10:13 Go to last post
  13. Closed: X/i/l/i/n/x ISE 4.2 tutorial

    Started by uummcc, 20th February 2003 09:33
    • Replies: 0
    • Views: 1,627
    20th February 2003, 09:33 Go to last post
  14. Closed: State Machine Coding Styles

    Started by smalloof, 20th February 2003 09:06
    • Replies: 1
    • Views: 2,204
    20th February 2003, 09:19 Go to last post
  15. Closed: tcad-test - a pdf file to download

    Started by smalloof, 20th February 2003 09:09
    • Replies: 0
    • Views: 1,535
    20th February 2003, 09:09 Go to last post
  16. Closed: xilinx fpga design tutorial

    Started by uummcc, 19th February 2003 07:41
    • Replies: 0
    • Views: 2,209
    19th February 2003, 07:41 Go to last post
  17. Closed: Need help for design DSP-core for wireless application,

    Started by dd2001, 14th February 2003 14:56
    • Replies: 1
    • Views: 1,907
    18th February 2003, 10:18 Go to last post
  18. Closed: VHDL and FPGA Resources on the Web (links)

    Started by igorilla, 16th February 2003 17:38
    • Replies: 2
    • Views: 2,015
    18th February 2003, 05:34 Go to last post
  19. Closed: Who implements IDE interface with CPLD?

    Started by mYthorON, 17th February 2003 09:04
    • Replies: 1
    • Views: 2,503
    17th February 2003, 09:12 Go to last post
  20. Closed: Xilinx Fpga Programming Card

    Started by myertas, 23rd January 2003 11:30
    • Replies: 3
    • Views: 2,342
    17th February 2003, 07:16 Go to last post
  21. Closed: Good links about "CPU Design and Architecture"

    Started by Bus Master, 17th February 2003 00:15
    • Replies: 0
    • Views: 1,585
    17th February 2003, 00:15 Go to last post
  22. Closed: xc7354 and xc7372 datasheet

    Started by lollobrigido, 16th February 2003 14:43
    • Replies: 1
    • Views: 1,698
    16th February 2003, 14:52 Go to last post
  23. Closed: Free Design examples for FPGA

    Started by igorilla, 16th February 2003 14:19
    • Replies: 0
    • Views: 1,652
    16th February 2003, 14:19 Go to last post
  24. Closed: tools for cypress cplds ?

    Started by indynetra, 15th February 2003 19:20
    • Replies: 4
    • Views: 2,377
    16th February 2003, 12:11 Go to last post
  25. Closed: ARM9 FPGA Verification Board Needed!

    Started by clifftsai, 11th February 2003 06:51
    • Replies: 2
    • Views: 3,015
    15th February 2003, 03:18 Go to last post
  26. Closed: Altera Pci core... Good luck

    Started by myertas, 14th February 2003 11:42
    • Replies: 3
    • Views: 2,489
    15th February 2003, 03:13 Go to last post
  27. Closed: E-paper: Verilog Introduction

    Started by dd2001, 14th February 2003 15:07
    • Replies: 0
    • Views: 1,606
    14th February 2003, 15:07 Go to last post
  28. Closed: Virtex-IIP PowerPC Simulation

    Started by mami_hacky, 1st February 2003 17:59
    • Replies: 5
    • Views: 2,425
    14th February 2003, 04:34 Go to last post
  29. Closed: how to reconfigure an SRAM based FPGA

    Started by 0levanhoc, 7th February 2003 11:43
    • Replies: 3
    • Views: 2,787
    14th February 2003, 04:24 Go to last post
  30. Closed: How to interface Xilinx FPGA Spartan II to a ISA Bus ?

    Started by yodathegreat, 13th February 2003 04:37
    • Replies: 1
    • Views: 2,792
    13th February 2003, 09:18 Go to last post