1. Announcement:
    Forum rules & policies (quick reference)
    alexan_e (Administrator)
    7th August 2014
    Views:
    88,664
Page 1 of 786 1 2 3 11 51 101 501 ... LastLast
Threads 1 to 30 of 23556

Forum: ASIC Design Methodologies and Tools (Digital)

ASIC (Application Specific Integrated Circuit) design methodologies design tool (simulator, synthesis...) related questions

  1. Sticky Thread Sticky: ALL E-BOOKS HERE WILL BE DELETED!!! USERS WILL BE WARNED!!!

    Started by klug, 25th March 2007 08:41
    • Replies: 0
    • Views: 24,363
    25th March 2007, 08:41 Go to last post
  1. [SOLVED] Question of report_timing command in PrimeTime

    Started by hungtaowu, 24th April 2017 04:02
    • Replies: 4
    • Views: 503
    Today, 04:37 Go to last post
  2. [SOLVED] read_lib_saif command in modelsim

    Started by inputoutput, Today 00:04
    • Replies: 0
    • Views: 112
    Today, 00:04 Go to last post
  3. Priority encoder for one-hot-to-binary

    Started by promach, 19th April 2017 02:27
    • Replies: 8
    • Views: 547
    Yesterday, 12:39 Go to last post
  4. Metastability of a D flip flop

    Started by identical, 25th April 2017 18:21
    • Replies: 9
    • Views: 481
    26th April 2017, 18:38 Go to last post
  5. design of reversible t flip flop

    Started by shashi106, 26th April 2017 07:10
    • Replies: 2
    • Views: 99
    26th April 2017, 08:03 Go to last post
    • Replies: 3
    • Views: 146
    25th April 2017, 18:13 Go to last post
  6. Do higher metal layers have lesser delay

    Started by identical, 24th April 2017 17:54
    • Replies: 1
    • Views: 114
    24th April 2017, 18:39 Go to last post
  7. Adjusting clock skew for setup violation

    Started by identical, 23rd April 2017 17:46
    • Replies: 2
    • Views: 94
    24th April 2017, 03:16 Go to last post
  8. Design for testability - time limits in practice

    Started by andrew_ww, 23rd April 2017 16:11
    • Replies: 3
    • Views: 189
    23rd April 2017, 23:25 Go to last post
  9. Preserving net naming in Synthesis using DC

    Started by birbal, 21st April 2017 12:26
    • Replies: 3
    • Views: 504
    22nd April 2017, 15:57 Go to last post
  10. Timing constraint file

    Started by ragramya75, 2nd April 2017 17:11
    • Replies: 4
    • Views: 372
    21st April 2017, 20:29 Go to last post
  11. Charactiresation SRAM with liberate MX

    Started by Dima_M, 21st April 2017 18:04
    • Replies: 1
    • Views: 186
    21st April 2017, 18:41 Go to last post
  12. Pst layout delay calculation in cadence

    Started by ragramya75, 21st April 2017 08:48
    • Replies: 1
    • Views: 133
    21st April 2017, 15:11 Go to last post
  13. Compilation of protected file in NCSIM

    Started by muthu7495, 21st April 2017 08:13
    • Replies: 1
    • Views: 94
    21st April 2017, 15:10 Go to last post
  14. Correct BUMP Pitch to use

    Started by GDesign, 21st April 2017 09:11
    • Replies: 1
    • Views: 93
    21st April 2017, 15:09 Go to last post
  15. Elaboration error in NCSIM

    Started by muthu7495, 21st April 2017 08:29
    • Replies: 1
    • Views: 122
    21st April 2017, 10:55 Go to last post
  16. Does clock latency always have to be reduced

    Started by identical, 15th April 2017 20:29
    • Replies: 1
    • Views: 242
    21st April 2017, 09:18 Go to last post
  17. [move] setup/hold time of logic gates

    Started by oAwad, 18th April 2017 11:44
    • Replies: 19
    • Views: 1,110
    21st April 2017, 04:08 Go to last post
    • Replies: 1
    • Views: 213
    21st April 2017, 03:55 Go to last post
  18. Enabling Code coverage in VCS

    Started by koolklara, 20th April 2017 23:51
    • Replies: 0
    • Views: 140
    20th April 2017, 23:51 Go to last post
  19. NCSIM Simulation ERROR

    Started by muthu7495, 19th April 2017 11:48
    • Replies: 5
    • Views: 271
    20th April 2017, 18:58 Go to last post
  20. ERROR IN NCSIM Simulation -E,CUVMUR

    Started by muthu7495, 20th April 2017 14:02
    • Replies: 1
    • Views: 199
    20th April 2017, 18:57 Go to last post
  21. MATLAB simulink ,Xilinx which is best one?

    Started by ecasha, 20th April 2017 09:20
    • Replies: 1
    • Views: 205
    20th April 2017, 09:42 Go to last post
  22. $recovery error in post-synthesis simulation

    Started by inputoutput, 16th April 2017 14:52
    • Replies: 10
    • Views: 414
    19th April 2017, 20:10 Go to last post
  23. What is the physical meaning of a layer being "TRIM"?

    Started by ttxs, 19th April 2017 01:11
    • Replies: 1
    • Views: 171
    19th April 2017, 01:36 Go to last post
  24. Restoring Division Agorithm

    Started by promach, 1st April 2017 17:22
    • Replies: 17
    • Views: 730
    18th April 2017, 17:15 Go to last post
  25. ATPG : Sequential depth in waveforms

    Started by shalin mandiwala, 18th April 2017 10:21
    • Replies: 0
    • Views: 168
    18th April 2017, 10:21 Go to last post
  26. Do I need to use AXI

    Started by yw21century, 16th April 2017 16:19
    • Replies: 3
    • Views: 289
    18th April 2017, 08:24 Go to last post
  27. storing values in array

    Started by ecasha, 17th April 2017 18:28
    • Replies: 4
    • Views: 383
    18th April 2017, 07:53 Go to last post