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Forum: ASIC Design Methodologies and Tools (Digital)

ASIC (Application Specific Integrated Circuit) design methodologies design tool (simulator, synthesis...) related questions

  1. Sticky Thread Sticky: ALL E-BOOKS HERE WILL BE DELETED!!! USERS WILL BE WARNED!!!

    Started by klug, 25th March 2007 08:41
    • Replies: 0
    • Views: 29,556
    25th March 2007, 08:41 Go to last post
  1. [SOLVED] Synopsys IC Compiler warning and Error

    Started by dayana42200, 9th February 2018 06:04
    • Replies: 6
    • Views: 532
    Yesterday, 15:38 Go to last post
  2. unresolved module error

    Started by palanis29, Yesterday 11:26
    • Replies: 1
    • Views: 81
    Yesterday, 15:37 Go to last post
    • Replies: 7
    • Views: 310
    22nd February 2018, 15:19 Go to last post
  3. IC Compiler error for clock tree synthesis

    Started by dayana42200, 20th February 2018 06:13
    • Replies: 3
    • Views: 137
    22nd February 2018, 02:17 Go to last post
  4. How to import timing library in INNOVUS?

    Started by bianchixr4, 30th January 2018 12:57
    • Replies: 3
    • Views: 500
    21st February 2018, 21:21 Go to last post
    • Replies: 1
    • Views: 164
    20th February 2018, 15:46 Go to last post
  5. reading lib file in lc_shell

    Started by jmaileh.b, 20th February 2018 07:00
    • Replies: 1
    • Views: 112
    20th February 2018, 07:55 Go to last post
  6. [SOLVED] Which cache use SRAM technology, Off-chip cache or On-chip cache?

    Started by vivekraj, 18th February 2018 21:58
    • Replies: 1
    • Views: 310
    19th February 2018, 16:03 Go to last post
  7. How to change metal routing orientation in INNOVUS

    Started by Anklon, 18th February 2018 12:12
    • Replies: 1
    • Views: 146
    18th February 2018, 20:11 Go to last post
  8. Generate clocks and their clock uncertainties

    Started by harpv, 17th February 2018 14:23
    • Replies: 1
    • Views: 218
    17th February 2018, 15:05 Go to last post
  9. How to dump gif in innovus in nowin mode

    Started by jaya81186, 16th February 2018 14:33
    • Replies: 1
    • Views: 192
    16th February 2018, 20:07 Go to last post
  10. DFT command operation doubt

    Started by Baskar, 14th February 2018 13:29
    • Replies: 0
    • Views: 260
    14th February 2018, 13:29 Go to last post
  11. Questions on Fanout of 4

    Started by promach, 13th February 2018 15:29
    • Replies: 1
    • Views: 239
    13th February 2018, 16:06 Go to last post
    • Replies: 1
    • Views: 239
    13th February 2018, 13:18 Go to last post
  12. Cadence Innovus: Corner pads placed with no offset

    Started by razer6, 8th February 2018 20:44
    • Replies: 5
    • Views: 634
    12th February 2018, 17:55 Go to last post
    • Replies: 0
    • Views: 209
    12th February 2018, 09:52 Go to last post
  13. Annotate delay in a path

    Started by lokeshwari, 12th February 2018 06:30
    • Replies: 0
    • Views: 204
    12th February 2018, 06:30 Go to last post
    • Replies: 3
    • Views: 337
    9th February 2018, 19:54 Go to last post
    • Replies: 0
    • Views: 256
    9th February 2018, 05:53 Go to last post
  14. UVM_FATAL Issue during factory overriding

    Started by vinitkanojia, 6th February 2018 13:47
    • Replies: 3
    • Views: 588
    7th February 2018, 17:10 Go to last post
    • Replies: 0
    • Views: 296
    7th February 2018, 16:50 Go to last post
    • Replies: 1
    • Views: 416
    6th February 2018, 19:41 Go to last post
  15. Cadence Encounter CreatePlaceBlockage

    Started by mcaduser, 6th February 2018 17:00
    • Replies: 1
    • Views: 456
    6th February 2018, 17:21 Go to last post
  16. what is spyglass check??

    Started by palanis29, 5th February 2018 08:23
    • Replies: 3
    • Views: 513
    6th February 2018, 09:51 Go to last post
    • Replies: 1
    • Views: 445
    6th February 2018, 09:35 Go to last post
  17. Need n bit decoder for the construction of the sram

    Started by Basu_Gouda, 2nd February 2018 11:44
    • Replies: 4
    • Views: 542
    6th February 2018, 07:17 Go to last post
    • Replies: 3
    • Views: 411
    5th February 2018, 03:55 Go to last post
  18. SystemVerilog assertions in the place of DFT?

    Started by hcu, 4th February 2018 11:57
    • Replies: 4
    • Views: 463
    5th February 2018, 03:51 Go to last post
    • Replies: 2
    • Views: 486
    5th February 2018, 02:37 Go to last post